[llvm] [clang] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)

[Pierre van Houtryve via cfe-commits]

================
@@ -605,12 +606,197 @@ class SIGfx12CacheControl : public SIGfx11CacheControl {
                                       bool IsNonTemporal) const override;
 };
 
+class SIPreciseMemorySupport {
----------------
Pierre-vh wrote:

Why does it need to be a separate class hierarchy?
It could just be part of CacheControl, and the functions can be named 
`handlePreciseMemoryAtomic/NonAtomic` ?
That would avoid a lot of boilerplate.

https://github.com/llvm/llvm-project/pull/79236
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits