https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/79399
>From 1d29443b30f6d6db2dbba0f78e8347ea126321e7 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Wed, 24 Jan 2024 18:39:07 -0800 Subject: [PATCH 1/7] [RISCV] Add many of the S extensions mentioned in the profile specification. This is a good portion of the extensions mentioned in the RVA23 profile here https://github.com/riscv/riscv-profiles/blob/main/rva23-profile.adoc I don't believe these add any new CSRs. Sstc does add new CSRs, but we already added them without the extension name. --- .../test/Preprocessor/riscv-target-features.c | 146 +++++++++++++++++- llvm/docs/RISCVUsage.rst | 15 ++ llvm/lib/Support/RISCVISAInfo.cpp | 16 ++ llvm/lib/Target/RISCV/RISCVFeatures.td | 59 +++++++ llvm/test/CodeGen/RISCV/attributes.ll | 64 ++++++++ llvm/test/MC/RISCV/attribute-arch.s | 48 ++++++ llvm/unittests/Support/RISCVISAInfoTest.cpp | 16 ++ 7 files changed, 363 insertions(+), 1 deletion(-) diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index 35d112bcd070f..17b921eae05c9 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -19,9 +19,25 @@ // CHECK-NOT: __riscv_m {{.*$}} // CHECK-NOT: __riscv_mul {{.*$}} // CHECK-NOT: __riscv_muldiv {{.*$}} +// CHECK-NOT: __riscv_shcounterenw {{.*$}} +// CHECK-NOT: __riscv_shgatpa {{.*$}} +// CHECK-NOT: __riscv_shtvala {{.*$}} +// CHECK-NOT: __riscv_shvsatpa {{.*$}} +// CHECK-NOT: __riscv_shvstvala {{.*$}} +// CHECK-NOT: __riscv_shvstvecd {{.*$}} // CHECK-NOT: __riscv_smaia {{.*$}} -// CHECK-NOT: __riscv_ssaia {{.*$}} // CHECK-NOT: __riscv_smepmp {{.*$}} +// CHECK-NOT: __riscv_ssaia {{.*$}} +// CHECK-NOT: __riscv_ssccptr {{.*$}} +// CHECK-NOT: __riscv_sscounterenw {{.*$}} +// CHECK-NOT: __riscv_ssstateen {{.*$}} +// CHECK-NOT: __riscv_sstc {{.*$}} +// CHECK-NOT: __riscv_sstvala {{.*$}} +// CHECK-NOT: __riscv_sstvecd {{.*$}} +// CHECK-NOT: __riscv_ssu64xl {{.*$}} +// CHECK-NOT: __riscv_svade {{.*$}} +// CHECK-NOT: __riscv_svadu {{.*$}} +// CHECK-NOT: __riscv_svbare {{.*$}} // CHECK-NOT: __riscv_svinval {{.*$}} // CHECK-NOT: __riscv_svnapot {{.*$}} // CHECK-NOT: __riscv_svpbmt {{.*$}} @@ -272,6 +288,134 @@ // CHECK-M-EXT: __riscv_mul 1 // CHECK-M-EXT: __riscv_muldiv 1 +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32ishcounterenw -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHCOUNTERENW-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64ishcounterenw -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHCOUNTERENW-EXT %s +// CHECK-SHCOUNTERENW-EXT: __riscv_shcounterenw 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32ishgatpa -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHGATPA-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64ishgatpa -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHGATPA-EXT %s +// CHECK-SHGATPA-EXT: __riscv_shgatpa 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32ishtvala -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHTVALA-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64ishtvala -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHTVALA-EXT %s +// CHECK-SHTVALA-EXT: __riscv_shtvala 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32ishvsatpa -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSATPA-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64ishvsatpa -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSATPA-EXT %s +// CHECK-SHVSATPA-EXT: __riscv_shvsatpa 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32ishvstvala -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVALA-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64ishvstvala -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVALA-EXT %s +// CHECK-SHVSTVALA-EXT: __riscv_shvstvala 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32ishvstvecd -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVECD-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64ishvstvecd -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVECD-EXT %s +// CHECK-SHVSTVECD-EXT: __riscv_shvstvecd 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32issccptr -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCCPTR-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64issccptr -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCCPTR-EXT %s +// CHECK-SSCCPTR-EXT: __riscv_ssccptr 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isscounterenw -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCOUNTERENW-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isscounterenw -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCOUNTERENW-EXT %s +// CHECK-SSCOUNTERENW-EXT: __riscv_sscounterenw 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32issstateen -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64issstateen -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s +// CHECK-SSSTATEEN-EXT: __riscv_ssstateen 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isstc -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isstc -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s +// CHECK-SSTC-EXT: __riscv_sstc 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isstvala -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVALA-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isstvala -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVALA-EXT %s +// CHECK-SSTVALA-EXT: __riscv_sstvala 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isstvecd -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVECD-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isstvecd -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVECD-EXT %s +// CHECK-SSTVECD-EXT: __riscv_sstvecd 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32issu64xl -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSU64XL-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64issu64xl -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSU64XL-EXT %s +// CHECK-SSU64XL-EXT: __riscv_ssu64xl 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isvade -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADE-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isvade -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADE-EXT %s +// CHECK-SVADE-EXT: __riscv_svade 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isvadu -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADU-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isvadu -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADU-EXT %s +// CHECK-SVADU-EXT: __riscv_svadu 1000000{{$}} + +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32isvbare -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVBARE-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64isvbare -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVBARE-EXT %s +// CHECK-SVBARE-EXT: __riscv_svbare 1000000{{$}} + // RUN: %clang --target=riscv32-unknown-linux-gnu \ // RUN: -march=rv32isvinval -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-SVINVAL-EXT %s diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index a957a8dfba95b..ad98efb51307f 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -91,9 +91,24 @@ on support follow. ``E`` Supported (`See note <#riscv-rve-note>`__) ``H`` Assembly Support ``M`` Supported + ``Shcounterenw`` Assembly Support + ``Shgatpa`` Assembly Support + ``Shtvala`` Assembly Support + ``Shvsatpa`` Assembly Support + ``Shvstvala`` Assembly Support + ``Shvstvecd`` Assembly Support ``Smaia`` Supported ``Smepmp`` Supported ``Ssaia`` Supported + ``Ssccptr`` Assembly Support + ``Sscounterenw`` Assembly Support + ``Sstc`` Assembly Support + ``Sstvala`` Assembly Support + ``Sstvecd`` Assembly Support + ``ssu64xl`` Assembly Support + ``Svade`` Assembly Support + ``Svadu`` Assembly Support + ``Svbare`` Assembly Support ``Svinval`` Assembly Support ``Svnapot`` Assembly Support ``Svpbmt`` Supported diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp index 8f31b0f40d5c9..f60b4814e230e 100644 --- a/llvm/lib/Support/RISCVISAInfo.cpp +++ b/llvm/lib/Support/RISCVISAInfo.cpp @@ -55,9 +55,25 @@ static const RISCVSupportedExtension SupportedExtensions[] = { {"i", {2, 1}}, {"m", {2, 0}}, + {"shcounterenw", {1, 0}}, + {"shgatpa", {1, 0}}, + {"shtvala", {1, 0}}, + {"shvsatpa", {1, 0}}, + {"shvstvala", {1, 0}}, + {"shvstvecd", {1, 0}}, {"smaia", {1, 0}}, {"smepmp", {1, 0}}, {"ssaia", {1, 0}}, + {"ssccptr", {1, 0}}, + {"sscounterenw", {1, 0}}, + {"ssstateen", {1, 0}}, + {"sstc", {1, 0}}, + {"sstvala", {1, 0}}, + {"sstvecd", {1, 0}}, + {"ssu64xl", {1, 0}}, + {"svade", {1, 0}}, + {"svadu", {1, 0}}, + {"svbare", {1, 0}}, {"svinval", {1, 0}}, {"svnapot", {1, 0}}, {"svpbmt", {1, 0}}, diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index 6f87eae101f04..380b65551fd24 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -783,6 +783,13 @@ def HasStdExtH : Predicate<"Subtarget->hasStdExtH()">, // Supervisor extensions +def FeatureStdExtShgatpa + : SubtargetFeature<"shgatpa", "HasStdExtShgatpa", "true", + "'Sgatpa' (SvNNx4 mode supported for all modes supported by satp, as well as Bare)", []>; +def FeatureStdExtShvsatpa + : SubtargetFeature<"shvsatpa", "HasStdExtSvsatpa", "true", + "'Svsatpa' (vsatp supports all modes supported by satp)", []>; + def FeatureStdExtSmaia : SubtargetFeature<"smaia", "HasStdExtSmaia", "true", "'Smaia' (Advanced Interrupt Architecture Machine " @@ -796,6 +803,58 @@ def FeatureStdExtSmepmp : SubtargetFeature<"smepmp", "HasStdExtSmepmp", "true", "'Smepmp' (Enhanced Physical Memory Protection)", []>; +def FeatureStdExtSsccptr + : SubtargetFeature<"ssccptr", "HasStdExtSsccptr", "true", + "'Ssccptr' (Main memory supports page table reads)", []>; + +def FeatureStdExtShcounterenvw + : SubtargetFeature<"shcounterenw", "HasStdExtShcounterenw", "true", + "'Shcounterenw' (Support writeable enables for any supproted counter)", []>; +def FeatureStdExtSscounterenvw + : SubtargetFeature<"sscounterenw", "HasStdExtSscounterenw", "true", + "'Sscounterenw' (Support writeable enables for any supproted counter)", []>; + +def FeatureStdExtSsstateen + : SubtargetFeature<"ssstateen", "HasStdExtSsstateen", "true", + "'Ssstateen' (Supervisor-mode view of the state-enable extension)", []>; + +def FeatureStdExtSstc + : SubtargetFeature<"sstc", "HasStdExtSstc", "true", + "'Sstc' (Supervisor-mode timer interrupts)", []>; + +def FeatureStdExtShtvala + : SubtargetFeature<"shtvala", "HasStdExtShtvala", "true", + "'Shtvala' (htval provides all needed values)", []>; +def FeatureStdExtShvstvala + : SubtargetFeature<"shvstvala", "HasStdExtShvstvala", "true", + "'Shvstvala' (vstval provides all needed values)", []>; +def FeatureStdExtSstvala + : SubtargetFeature<"sstvala", "HasStdExtSstvala", "true", + "'Sstvala' (stval provides all needed values)", []>; + +def FeatureStdExtShvstvecd + : SubtargetFeature<"shvstvecd", "HasStdExtShvstvecd", "true", + "'Shvstvecd' (vstvec supports Direct mode)", []>; +def FeatureStdExtSstvecd + : SubtargetFeature<"sstvecd", "HasStdExtSstvecd", "true", + "'Sstvecd' (stvec supports Direct mode)", []>; + +def FeatureStdExtSsu64xl + : SubtargetFeature<"ssu64xl", "HasStdExtSsu64xl", "true", + "'Ssu64xl' (UXLEN=64 supported)", []>; + +def FeaturesStdExtSvade + : SubtargetFeature<"svade", "HasStdExtSvade", "true", + "'Svade' (Raise exceptions on improper A/D bits)", []>; + +def FeaturesStdExtSvadu + : SubtargetFeature<"svadu", "HasStdExtSvadu", "true", + "'Svadu' (Hardware A/D updates)", []>; + +def FeaturesStdExtSvbare + : SubtargetFeature<"svbare", "HasStdExtSvbare", "true", + "'Svbare' $(satp mode Bare supported)", []>; + def FeatureStdExtSvinval : SubtargetFeature<"svinval", "HasStdExtSvinval", "true", "'Svinval' (Fine-Grained Address-Translation Cache Invalidation)">; diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll index f7b53d6de27f2..fb18ae174e522 100644 --- a/llvm/test/CodeGen/RISCV/attributes.ll +++ b/llvm/test/CodeGen/RISCV/attributes.ll @@ -38,6 +38,22 @@ ; RUN: llc -mtriple=riscv32 -mattr=+zicbom %s -o - | FileCheck --check-prefixes=CHECK,RV32ZICBOM %s ; RUN: llc -mtriple=riscv32 -mattr=+zicboz %s -o - | FileCheck --check-prefixes=CHECK,RV32ZICBOZ %s ; RUN: llc -mtriple=riscv32 -mattr=+zicbop %s -o - | FileCheck --check-prefixes=CHECK,RV32ZICBOP %s +; RUN: llc -mtriple=riscv32 -mattr=+shcounterenw %s -o - | FileCheck --check-prefixes=CHECK,RV32SHCOUNTERENW %s +; RUN: llc -mtriple=riscv32 -mattr=+shgatpa %s -o - | FileCheck --check-prefixes=CHECK,RV32SHGATPA %s +; RUN: llc -mtriple=riscv32 -mattr=+shvsatpa %s -o - | FileCheck --check-prefixes=CHECK,RV32SHVSATPA %s +; RUN: llc -mtriple=riscv32 -mattr=+ssccptr %s -o - | FileCheck --check-prefixes=CHECK,RV32SSCCPTR %s +; RUN: llc -mtriple=riscv32 -mattr=+sscounterenw %s -o - | FileCheck --check-prefixes=CHECK,RV32SSCOUNTERENW %s +; RUN: llc -mtriple=riscv32 -mattr=+ssstateen %s -o - | FileCheck --check-prefixes=CHECK,RV32SSSTATEEN %s +; RUN: llc -mtriple=riscv32 -mattr=+sstc %s -o - | FileCheck --check-prefixes=CHECK,RV32SSTC %s +; RUN: llc -mtriple=riscv32 -mattr=+shtvala %s -o - | FileCheck --check-prefixes=CHECK,RV32SHTVALA %s +; RUN: llc -mtriple=riscv32 -mattr=+shvstvala %s -o - | FileCheck --check-prefixes=CHECK,RV32SHVSTVALA %s +; RUN: llc -mtriple=riscv32 -mattr=+shvstvecd %s -o - | FileCheck --check-prefixes=CHECK,RV32SHVSTVECD %s +; RUN: llc -mtriple=riscv32 -mattr=+sstvala %s -o - | FileCheck --check-prefixes=CHECK,RV32SSTVALA %s +; RUN: llc -mtriple=riscv32 -mattr=+sstvecd %s -o - | FileCheck --check-prefixes=CHECK,RV32SSTVECD %s +; RUN: llc -mtriple=riscv32 -mattr=+ssu64xl %s -o - | FileCheck --check-prefixes=CHECK,RV32SSU64XL %s +; RUN: llc -mtriple=riscv32 -mattr=+svade %s -o - | FileCheck --check-prefixes=CHECK,RV32SVADE %s +; RUN: llc -mtriple=riscv32 -mattr=+svadu %s -o - | FileCheck --check-prefixes=CHECK,RV32SVADU %s +; RUN: llc -mtriple=riscv32 -mattr=+svbare %s -o - | FileCheck --check-prefixes=CHECK,RV32SVBARE %s ; RUN: llc -mtriple=riscv32 -mattr=+svnapot %s -o - | FileCheck --check-prefixes=CHECK,RV32SVNAPOT %s ; RUN: llc -mtriple=riscv32 -mattr=+svpbmt %s -o - | FileCheck --check-prefixes=CHECK,RV32SVPBMT %s ; RUN: llc -mtriple=riscv32 -mattr=+svinval %s -o - | FileCheck --check-prefixes=CHECK,RV32SVINVAL %s @@ -139,6 +155,22 @@ ; RUN: llc -mtriple=riscv64 -mattr=+zicbom %s -o - | FileCheck --check-prefixes=CHECK,RV64ZICBOM %s ; RUN: llc -mtriple=riscv64 -mattr=+zicboz %s -o - | FileCheck --check-prefixes=CHECK,RV64ZICBOZ %s ; RUN: llc -mtriple=riscv64 -mattr=+zicbop %s -o - | FileCheck --check-prefixes=CHECK,RV64ZICBOP %s +; RUN: llc -mtriple=riscv64 -mattr=+shcounterenw %s -o - | FileCheck --check-prefixes=CHECK,RV64SHCOUNTERENW %s +; RUN: llc -mtriple=riscv64 -mattr=+shgatpa %s -o - | FileCheck --check-prefixes=CHECK,RV64SHGATPA %s +; RUN: llc -mtriple=riscv64 -mattr=+shvsatpa %s -o - | FileCheck --check-prefixes=CHECK,RV64SHVSATPA %s +; RUN: llc -mtriple=riscv64 -mattr=+ssccptr %s -o - | FileCheck --check-prefixes=CHECK,RV64SSCCPTR %s +; RUN: llc -mtriple=riscv64 -mattr=+sscounterenw %s -o - | FileCheck --check-prefixes=CHECK,RV64SSCOUNTERENW %s +; RUN: llc -mtriple=riscv64 -mattr=+ssstateen %s -o - | FileCheck --check-prefixes=CHECK,RV64SSSTATEEN %s +; RUN: llc -mtriple=riscv64 -mattr=+sstc %s -o - | FileCheck --check-prefixes=CHECK,RV64SSTC %s +; RUN: llc -mtriple=riscv64 -mattr=+shtvala %s -o - | FileCheck --check-prefixes=CHECK,RV64SHTVALA %s +; RUN: llc -mtriple=riscv64 -mattr=+shvstvala %s -o - | FileCheck --check-prefixes=CHECK,RV64SHVSTVALA %s +; RUN: llc -mtriple=riscv64 -mattr=+shvstvecd %s -o - | FileCheck --check-prefixes=CHECK,RV64SHVSTVECD %s +; RUN: llc -mtriple=riscv64 -mattr=+sstvala %s -o - | FileCheck --check-prefixes=CHECK,RV64SSTVALA %s +; RUN: llc -mtriple=riscv64 -mattr=+sstvecd %s -o - | FileCheck --check-prefixes=CHECK,RV64SSTVECD %s +; RUN: llc -mtriple=riscv64 -mattr=+ssu64xl %s -o - | FileCheck --check-prefixes=CHECK,RV64SSU64XL %s +; RUN: llc -mtriple=riscv64 -mattr=+svade %s -o - | FileCheck --check-prefixes=CHECK,RV64SVADE %s +; RUN: llc -mtriple=riscv64 -mattr=+svadu %s -o - | FileCheck --check-prefixes=CHECK,RV64SVADU %s +; RUN: llc -mtriple=riscv64 -mattr=+svbare %s -o - | FileCheck --check-prefixes=CHECK,RV64SVBARE %s ; RUN: llc -mtriple=riscv64 -mattr=+svnapot %s -o - | FileCheck --check-prefixes=CHECK,RV64SVNAPOT %s ; RUN: llc -mtriple=riscv64 -mattr=+svpbmt %s -o - | FileCheck --check-prefixes=CHECK,RV64SVPBMT %s ; RUN: llc -mtriple=riscv64 -mattr=+svinval %s -o - | FileCheck --check-prefixes=CHECK,RV64SVINVAL %s @@ -245,6 +277,22 @@ ; RV32ZICBOM: .attribute 5, "rv32i2p1_zicbom1p0" ; RV32ZICBOZ: .attribute 5, "rv32i2p1_zicboz1p0" ; RV32ZICBOP: .attribute 5, "rv32i2p1_zicbop1p0" +; RV32SHCOUNTERENW: .attribute 5, "rv32i2p1_shcounterenw1p0" +; RV32SHGATPA: .attribute 5, "rv32i2p1_shgatpa1p0" +; RV32SHVSATPA: .attribute 5, "rv32i2p1_shvsatpa1p0" +; RV32SSCCPTR: .attribute 5, "rv32i2p1_ssccptr1p0" +; RV32SSCOUNTERENW: .attribute 5, "rv32i2p1_sscounterenw1p0" +; RV32SSSTATEEN: .attribute 5, "rv32i2p1_ssstateen1p0" +; RV32SSTC: .attribute 5, "rv32i2p1_sstc1p0" +; RV32SHTVALA: .attribute 5, "rv32i2p1_shtvala1p0" +; RV32SHVSTVALA: .attribute 5, "rv32i2p1_shvstvala1p0" +; RV32SHVSTVECD: .attribute 5, "rv32i2p1_shvstvecd1p0" +; RV32SSTVALA: .attribute 5, "rv32i2p1_sstvala1p0" +; RV32SSTVECD: .attribute 5, "rv32i2p1_sstvecd1p0" +; RV32SSU64XL: .attribute 5, "rv32i2p1_ssu64xl1p0" +; RV32SVADE: .attribute 5, "rv32i2p1_svade1p0" +; RV32SVADU: .attribute 5, "rv32i2p1_svadu1p0" +; RV32SVBARE: .attribute 5, "rv32i2p1_svbare1p0" ; RV32SVNAPOT: .attribute 5, "rv32i2p1_svnapot1p0" ; RV32SVPBMT: .attribute 5, "rv32i2p1_svpbmt1p0" ; RV32SVINVAL: .attribute 5, "rv32i2p1_svinval1p0" @@ -348,6 +396,22 @@ ; RV64ZA128RS: .attribute 5, "rv64i2p1_za128rs1p0" ; RV64ZAWRS: .attribute 5, "rv64i2p1_zawrs1p0" ; RV64ZICBOP: .attribute 5, "rv64i2p1_zicbop1p0" +; RV64SHCOUNTERENW: .attribute 5, "rv64i2p1_shcounterenw1p0" +; RV64SHGATPA: .attribute 5, "rv64i2p1_shgatpa1p0" +; RV64SHVSATPA: .attribute 5, "rv64i2p1_shvsatpa1p0" +; RV64SSCCPTR: .attribute 5, "rv64i2p1_ssccptr1p0" +; RV64SSCOUNTERENW: .attribute 5, "rv64i2p1_sscounterenw1p0" +; RV64SSSTATEEN: .attribute 5, "rv64i2p1_ssstateen1p0" +; RV64SSTC: .attribute 5, "rv64i2p1_sstc1p0" +; RV64SHTVALA: .attribute 5, "rv64i2p1_shtvala1p0" +; RV64SHVSTVALA: .attribute 5, "rv64i2p1_shvstvala1p0" +; RV64SHVSTVECD: .attribute 5, "rv64i2p1_shvstvecd1p0" +; RV64SSTVALA: .attribute 5, "rv64i2p1_sstvala1p0" +; RV64SSTVECD: .attribute 5, "rv64i2p1_sstvecd1p0" +; RV64SSU64XL: .attribute 5, "rv64i2p1_ssu64xl1p0" +; RV64SVADE: .attribute 5, "rv64i2p1_svade1p0" +; RV64SVADU: .attribute 5, "rv64i2p1_svadu1p0" +; RV64SVBARE: .attribute 5, "rv64i2p1_svbare1p0" ; RV64SVNAPOT: .attribute 5, "rv64i2p1_svnapot1p0" ; RV64SVPBMT: .attribute 5, "rv64i2p1_svpbmt1p0" ; RV64SVINVAL: .attribute 5, "rv64i2p1_svinval1p0" diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s index 8810ca6781cff..ebc69066df3af 100644 --- a/llvm/test/MC/RISCV/attribute-arch.s +++ b/llvm/test/MC/RISCV/attribute-arch.s @@ -288,6 +288,24 @@ .attribute arch, "rv32izicond1p0" # CHECK: attribute 5, "rv32i2p1_zicond1p0" +.attribute arch, "rv32i_shcounterenw1p0" +# CHECK: attribute 5, "rv32i2p1_shcounterenw1p0" + +.attribute arch, "rv32i_shgatpa1p0" +# CHECK: attribute 5, "rv32i2p1_shgatpa1p0" + +.attribute arch, "rv32i_shvsatpa1p0" +# CHECK: attribute 5, "rv32i2p1_shvsatpa1p0" + +.attribute arch, "rv32i_shtvala1p0" +# CHECK: attribute 5, "rv32i2p1_shtvala1p0" + +.attribute arch, "rv32i_shvstvala1p0" +# CHECK: attribute 5, "rv32i2p1_shvstvala1p0" + +.attribute arch, "rv32i_shvstvecd1p0" +# CHECK: attribute 5, "rv32i2p1_shvstvecd1p0" + .attribute arch, "rv32i_smaia1p0" # CHECK: attribute 5, "rv32i2p1_smaia1p0" @@ -297,6 +315,36 @@ .attribute arch, "rv32i_smepmp1p0" # CHECK: attribute 5, "rv32i2p1_smepmp1p0" +.attribute arch, "rv32i_ssccptr1p0" +# CHECK: attribute 5, "rv32i2p1_ssccptr1p0" + +.attribute arch, "rv32i_sscounterenw1p0" +# CHECK: attribute 5, "rv32i2p1_sscounterenw1p0" + +.attribute arch, "rv32i_ssstateen1p0" +# CHECK: attribute 5, "rv32i2p1_ssstateen1p0" + +.attribute arch, "rv32i_sstc1p0" +# CHECK: attribute 5, "rv32i2p1_sstc1p0" + +.attribute arch, "rv32i_sstvala1p0" +# CHECK: attribute 5, "rv32i2p1_sstvala1p0" + +.attribute arch, "rv32i_sstvecd1p0" +# CHECK: attribute 5, "rv32i2p1_sstvecd1p0" + +.attribute arch, "rv32i_ssu64xl1p0" +# CHECK: attribute 5, "rv32i2p1_ssu64xl1p0" + +.attribute arch, "rv32i_svade1p0" +# CHECK: attribute 5, "rv32i2p1_svade1p0" + +.attribute arch, "rv32i_svadu1p0" +# CHECK: attribute 5, "rv32i2p1_svadu1p0" + +.attribute arch, "rv32i_svbare1p0" +# CHECK: attribute 5, "rv32i2p1_svbare1p0" + .attribute arch, "rv32i_zfbfmin1p0" # CHECK: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfbfmin1p0" diff --git a/llvm/unittests/Support/RISCVISAInfoTest.cpp b/llvm/unittests/Support/RISCVISAInfoTest.cpp index 66e10bfcf1122..379e499edcf45 100644 --- a/llvm/unittests/Support/RISCVISAInfoTest.cpp +++ b/llvm/unittests/Support/RISCVISAInfoTest.cpp @@ -819,9 +819,25 @@ R"(All available -march extensions for RISC-V zvl8192b 1.0 zhinx 1.0 zhinxmin 1.0 + shcounterenw 1.0 + shgatpa 1.0 + shtvala 1.0 + shvsatpa 1.0 + shvstvala 1.0 + shvstvecd 1.0 smaia 1.0 smepmp 1.0 ssaia 1.0 + ssccptr 1.0 + sscounterenw 1.0 + ssstateen 1.0 + sstc 1.0 + sstvala 1.0 + sstvecd 1.0 + ssu64xl 1.0 + svade 1.0 + svadu 1.0 + svbare 1.0 svinval 1.0 svnapot 1.0 svpbmt 1.0 >From a4adec43013eadfab9f0b084f0359b1f9d853526 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Wed, 24 Jan 2024 20:39:12 -0800 Subject: [PATCH 2/7] fixup! Add ssstrict. Add Ssstateen to RISCVUsage.rst. Add link to profile spec. --- .../test/Preprocessor/riscv-target-features.c | 9 ++++++ llvm/docs/RISCVUsage.rst | 30 ++++++++++--------- llvm/lib/Support/RISCVISAInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVFeatures.td | 4 +++ llvm/test/CodeGen/RISCV/attributes.ll | 4 +++ llvm/test/MC/RISCV/attribute-arch.s | 3 ++ llvm/unittests/Support/RISCVISAInfoTest.cpp | 1 + 7 files changed, 38 insertions(+), 14 deletions(-) diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index 17b921eae05c9..5b0531ffdcc03 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -31,6 +31,7 @@ // CHECK-NOT: __riscv_ssccptr {{.*$}} // CHECK-NOT: __riscv_sscounterenw {{.*$}} // CHECK-NOT: __riscv_ssstateen {{.*$}} +// CHECK-NOT: __riscv_ssstrict {{.*$}} // CHECK-NOT: __riscv_sstc {{.*$}} // CHECK-NOT: __riscv_sstvala {{.*$}} // CHECK-NOT: __riscv_sstvecd {{.*$}} @@ -360,6 +361,14 @@ // RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s // CHECK-SSSTATEEN-EXT: __riscv_ssstateen 1000000{{$}} +// RUN: %clang --target=riscv32-unknown-linux-gnu \ +// RUN: -march=rv32issstrict -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTRICT-EXT %s +// RUN: %clang --target=riscv64-unknown-linux-gnu \ +// RUN: -march=rv64issstrict -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTRICT-EXT %s +// CHECK-SSSTRICT-EXT: __riscv_ssstrict 1000000{{$}} + // RUN: %clang --target=riscv32-unknown-linux-gnu \ // RUN: -march=rv32isstc -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index ad98efb51307f..d6d841c085cbc 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -91,24 +91,26 @@ on support follow. ``E`` Supported (`See note <#riscv-rve-note>`__) ``H`` Assembly Support ``M`` Supported - ``Shcounterenw`` Assembly Support - ``Shgatpa`` Assembly Support - ``Shtvala`` Assembly Support - ``Shvsatpa`` Assembly Support - ``Shvstvala`` Assembly Support - ``Shvstvecd`` Assembly Support + ``Shcounterenw`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Shgatpa`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Shtvala`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Shvsatpa`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Shvstvala`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Shvstvecd`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) ``Smaia`` Supported ``Smepmp`` Supported ``Ssaia`` Supported - ``Ssccptr`` Assembly Support - ``Sscounterenw`` Assembly Support + ``Ssccptr`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Sscounterenw`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Ssstateen`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Ssstrict`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) ``Sstc`` Assembly Support - ``Sstvala`` Assembly Support - ``Sstvecd`` Assembly Support - ``ssu64xl`` Assembly Support - ``Svade`` Assembly Support + ``Sstvala`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Sstvecd`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Ssu64xl`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) + ``Svade`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) ``Svadu`` Assembly Support - ``Svbare`` Assembly Support + ``Svbare`` Assembly Support (`See note <#riscv-profiles-extensions-note>`__) ``Svinval`` Assembly Support ``Svnapot`` Assembly Support ``Svpbmt`` Supported @@ -231,7 +233,7 @@ Supported .. _riscv-profiles-extensions-note: -``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, ``Ziccrse`` +``Za128rs``, ``Za64rs``, ``Zic64b``, ``Ziccamoa``, ``Ziccif``, ``Zicclsm``, ``Ziccrse``, ``Shcounterenvw``, ``Shgatpa``, ``Shtvala``, ``Shvsatpa``, ``Shvstvala``, ``Shvstvecd``, ``Ssccptr``, ``Sscounterenw``, ``Ssstateen``, ``Ssstrict``, ``Sstvala``, ``Sstvecd``, ``Ssu64xl``, ``Svade``, ``Svbare`` These extensions are defined as part of the `RISC-V Profiles specification <https://github.com/riscv/riscv-profiles/releases/tag/v1.0>`_. They do not introduce any new features themselves, but instead describe existing hardware features. Experimental Extensions diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp index f60b4814e230e..b4fa20d202d3e 100644 --- a/llvm/lib/Support/RISCVISAInfo.cpp +++ b/llvm/lib/Support/RISCVISAInfo.cpp @@ -67,6 +67,7 @@ static const RISCVSupportedExtension SupportedExtensions[] = { {"ssccptr", {1, 0}}, {"sscounterenw", {1, 0}}, {"ssstateen", {1, 0}}, + {"ssstrict", {1, 0}}, {"sstc", {1, 0}}, {"sstvala", {1, 0}}, {"sstvecd", {1, 0}}, diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index 380b65551fd24..6344c1a5411f4 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -818,6 +818,10 @@ def FeatureStdExtSsstateen : SubtargetFeature<"ssstateen", "HasStdExtSsstateen", "true", "'Ssstateen' (Supervisor-mode view of the state-enable extension)", []>; +def FeatureStdExtSsstrict + : SubtargetFeature<"ssstrict", "HasStdExtSsstrict", "true", + "'Ssstrict' (No non-conforming extensions are present.", []>; + def FeatureStdExtSstc : SubtargetFeature<"sstc", "HasStdExtSstc", "true", "'Sstc' (Supervisor-mode timer interrupts)", []>; diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll index fb18ae174e522..89b2190310f77 100644 --- a/llvm/test/CodeGen/RISCV/attributes.ll +++ b/llvm/test/CodeGen/RISCV/attributes.ll @@ -44,6 +44,7 @@ ; RUN: llc -mtriple=riscv32 -mattr=+ssccptr %s -o - | FileCheck --check-prefixes=CHECK,RV32SSCCPTR %s ; RUN: llc -mtriple=riscv32 -mattr=+sscounterenw %s -o - | FileCheck --check-prefixes=CHECK,RV32SSCOUNTERENW %s ; RUN: llc -mtriple=riscv32 -mattr=+ssstateen %s -o - | FileCheck --check-prefixes=CHECK,RV32SSSTATEEN %s +; RUN: llc -mtriple=riscv32 -mattr=+ssstrict %s -o - | FileCheck --check-prefixes=CHECK,RV32SSSTRICT %s ; RUN: llc -mtriple=riscv32 -mattr=+sstc %s -o - | FileCheck --check-prefixes=CHECK,RV32SSTC %s ; RUN: llc -mtriple=riscv32 -mattr=+shtvala %s -o - | FileCheck --check-prefixes=CHECK,RV32SHTVALA %s ; RUN: llc -mtriple=riscv32 -mattr=+shvstvala %s -o - | FileCheck --check-prefixes=CHECK,RV32SHVSTVALA %s @@ -161,6 +162,7 @@ ; RUN: llc -mtriple=riscv64 -mattr=+ssccptr %s -o - | FileCheck --check-prefixes=CHECK,RV64SSCCPTR %s ; RUN: llc -mtriple=riscv64 -mattr=+sscounterenw %s -o - | FileCheck --check-prefixes=CHECK,RV64SSCOUNTERENW %s ; RUN: llc -mtriple=riscv64 -mattr=+ssstateen %s -o - | FileCheck --check-prefixes=CHECK,RV64SSSTATEEN %s +; RUN: llc -mtriple=riscv64 -mattr=+ssstrict %s -o - | FileCheck --check-prefixes=CHECK,RV64SSSTRICT %s ; RUN: llc -mtriple=riscv64 -mattr=+sstc %s -o - | FileCheck --check-prefixes=CHECK,RV64SSTC %s ; RUN: llc -mtriple=riscv64 -mattr=+shtvala %s -o - | FileCheck --check-prefixes=CHECK,RV64SHTVALA %s ; RUN: llc -mtriple=riscv64 -mattr=+shvstvala %s -o - | FileCheck --check-prefixes=CHECK,RV64SHVSTVALA %s @@ -283,6 +285,7 @@ ; RV32SSCCPTR: .attribute 5, "rv32i2p1_ssccptr1p0" ; RV32SSCOUNTERENW: .attribute 5, "rv32i2p1_sscounterenw1p0" ; RV32SSSTATEEN: .attribute 5, "rv32i2p1_ssstateen1p0" +; RV32SSSTRICT: .attribute 5, "rv32i2p1_ssstrict1p0" ; RV32SSTC: .attribute 5, "rv32i2p1_sstc1p0" ; RV32SHTVALA: .attribute 5, "rv32i2p1_shtvala1p0" ; RV32SHVSTVALA: .attribute 5, "rv32i2p1_shvstvala1p0" @@ -402,6 +405,7 @@ ; RV64SSCCPTR: .attribute 5, "rv64i2p1_ssccptr1p0" ; RV64SSCOUNTERENW: .attribute 5, "rv64i2p1_sscounterenw1p0" ; RV64SSSTATEEN: .attribute 5, "rv64i2p1_ssstateen1p0" +; RV64SSSTRICT: .attribute 5, "rv64i2p1_ssstrict1p0" ; RV64SSTC: .attribute 5, "rv64i2p1_sstc1p0" ; RV64SHTVALA: .attribute 5, "rv64i2p1_shtvala1p0" ; RV64SHVSTVALA: .attribute 5, "rv64i2p1_shvstvala1p0" diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s index ebc69066df3af..34b7ee52da320 100644 --- a/llvm/test/MC/RISCV/attribute-arch.s +++ b/llvm/test/MC/RISCV/attribute-arch.s @@ -324,6 +324,9 @@ .attribute arch, "rv32i_ssstateen1p0" # CHECK: attribute 5, "rv32i2p1_ssstateen1p0" +.attribute arch, "rv32i_ssstrict1p0" +# CHECK: attribute 5, "rv32i2p1_ssstrict1p0" + .attribute arch, "rv32i_sstc1p0" # CHECK: attribute 5, "rv32i2p1_sstc1p0" diff --git a/llvm/unittests/Support/RISCVISAInfoTest.cpp b/llvm/unittests/Support/RISCVISAInfoTest.cpp index 379e499edcf45..8f44c7ba69364 100644 --- a/llvm/unittests/Support/RISCVISAInfoTest.cpp +++ b/llvm/unittests/Support/RISCVISAInfoTest.cpp @@ -831,6 +831,7 @@ R"(All available -march extensions for RISC-V ssccptr 1.0 sscounterenw 1.0 ssstateen 1.0 + ssstrict 1.0 sstc 1.0 sstvala 1.0 sstvecd 1.0 >From 38242c6a3ca031cc10fa338237e92061f0d35bf4 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Wed, 24 Jan 2024 21:20:48 -0800 Subject: [PATCH 3/7] fixup! Fix documentation build warning --- llvm/docs/RISCVUsage.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index d6d841c085cbc..1717f5f66c453 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -81,9 +81,9 @@ on support follow. .. table:: Ratified Extensions by Status - =============== ========================================================= + =============== ================================================================= Extension Status - =============== ========================================================= + =============== ================================================================= ``A`` Supported ``C`` Supported ``D`` Supported >From 1d113a8ffecf99cf82c64572c1ac009f19aa51c0 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Wed, 24 Jan 2024 22:39:49 -0800 Subject: [PATCH 4/7] fixup! reformat --- .../test/Preprocessor/riscv-target-features.c | 128 +++++++++--------- 1 file changed, 64 insertions(+), 64 deletions(-) diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index 5b0531ffdcc03..ed6b226f27004 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -290,131 +290,131 @@ // CHECK-M-EXT: __riscv_muldiv 1 // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32ishcounterenw -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHCOUNTERENW-EXT %s +// RUN: -march=rv32ishcounterenw -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHCOUNTERENW-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64ishcounterenw -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHCOUNTERENW-EXT %s +// RUN: -march=rv64ishcounterenw -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHCOUNTERENW-EXT %s // CHECK-SHCOUNTERENW-EXT: __riscv_shcounterenw 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32ishgatpa -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHGATPA-EXT %s +// RUN: -march=rv32ishgatpa -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHGATPA-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64ishgatpa -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHGATPA-EXT %s +// RUN: -march=rv64ishgatpa -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHGATPA-EXT %s // CHECK-SHGATPA-EXT: __riscv_shgatpa 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32ishtvala -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHTVALA-EXT %s +// RUN: -march=rv32ishtvala -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHTVALA-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64ishtvala -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHTVALA-EXT %s +// RUN: -march=rv64ishtvala -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHTVALA-EXT %s // CHECK-SHTVALA-EXT: __riscv_shtvala 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32ishvsatpa -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSATPA-EXT %s +// RUN: -march=rv32ishvsatpa -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSATPA-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64ishvsatpa -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSATPA-EXT %s +// RUN: -march=rv64ishvsatpa -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSATPA-EXT %s // CHECK-SHVSATPA-EXT: __riscv_shvsatpa 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32ishvstvala -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVALA-EXT %s +// RUN: -march=rv32ishvstvala -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVALA-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64ishvstvala -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVALA-EXT %s +// RUN: -march=rv64ishvstvala -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVALA-EXT %s // CHECK-SHVSTVALA-EXT: __riscv_shvstvala 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32ishvstvecd -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVECD-EXT %s +// RUN: -march=rv32ishvstvecd -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVECD-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64ishvstvecd -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVECD-EXT %s +// RUN: -march=rv64ishvstvecd -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SHVSTVECD-EXT %s // CHECK-SHVSTVECD-EXT: __riscv_shvstvecd 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32issccptr -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSCCPTR-EXT %s +// RUN: -march=rv32issccptr -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCCPTR-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64issccptr -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSCCPTR-EXT %s +// RUN: -march=rv64issccptr -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCCPTR-EXT %s // CHECK-SSCCPTR-EXT: __riscv_ssccptr 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isscounterenw -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSCOUNTERENW-EXT %s +// RUN: -march=rv32isscounterenw -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCOUNTERENW-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isscounterenw -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSCOUNTERENW-EXT %s +// RUN: -march=rv64isscounterenw -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSCOUNTERENW-EXT %s // CHECK-SSCOUNTERENW-EXT: __riscv_sscounterenw 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32issstateen -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s +// RUN: -march=rv32issstateen -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64issstateen -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s +// RUN: -march=rv64issstateen -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTATEEN-EXT %s // CHECK-SSSTATEEN-EXT: __riscv_ssstateen 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32issstrict -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTRICT-EXT %s +// RUN: -march=rv32issstrict -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTRICT-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64issstrict -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTRICT-EXT %s +// RUN: -march=rv64issstrict -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSSTRICT-EXT %s // CHECK-SSSTRICT-EXT: __riscv_ssstrict 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isstc -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s +// RUN: -march=rv32isstc -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isstc -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s +// RUN: -march=rv64isstc -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTC-EXT %s // CHECK-SSTC-EXT: __riscv_sstc 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isstvala -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVALA-EXT %s +// RUN: -march=rv32isstvala -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVALA-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isstvala -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVALA-EXT %s +// RUN: -march=rv64isstvala -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVALA-EXT %s // CHECK-SSTVALA-EXT: __riscv_sstvala 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isstvecd -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVECD-EXT %s +// RUN: -march=rv32isstvecd -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVECD-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isstvecd -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVECD-EXT %s +// RUN: -march=rv64isstvecd -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSTVECD-EXT %s // CHECK-SSTVECD-EXT: __riscv_sstvecd 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32issu64xl -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSU64XL-EXT %s +// RUN: -march=rv32issu64xl -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSU64XL-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64issu64xl -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SSU64XL-EXT %s +// RUN: -march=rv64issu64xl -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SSU64XL-EXT %s // CHECK-SSU64XL-EXT: __riscv_ssu64xl 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isvade -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SVADE-EXT %s +// RUN: -march=rv32isvade -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADE-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isvade -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SVADE-EXT %s +// RUN: -march=rv64isvade -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADE-EXT %s // CHECK-SVADE-EXT: __riscv_svade 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isvadu -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SVADU-EXT %s +// RUN: -march=rv32isvadu -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADU-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isvadu -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SVADU-EXT %s +// RUN: -march=rv64isvadu -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVADU-EXT %s // CHECK-SVADU-EXT: __riscv_svadu 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ >From 3c8fc318cb3d386371fbca74bf289964b28851e3 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Wed, 24 Jan 2024 22:40:36 -0800 Subject: [PATCH 5/7] fixup! reformat --- clang/test/Preprocessor/riscv-target-features.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index ed6b226f27004..f81ec7ac4532f 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -418,11 +418,11 @@ // CHECK-SVADU-EXT: __riscv_svadu 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ -// RUN: -march=rv32isvbare -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SVBARE-EXT %s +// RUN: -march=rv32isvbare -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVBARE-EXT %s // RUN: %clang --target=riscv64-unknown-linux-gnu \ -// RUN: -march=rv64isvbare -x c -E -dM %s \ -// RUN: -o - | FileCheck --check-prefix=CHECK-SVBARE-EXT %s +// RUN: -march=rv64isvbare -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-SVBARE-EXT %s // CHECK-SVBARE-EXT: __riscv_svbare 1000000{{$}} // RUN: %clang --target=riscv32-unknown-linux-gnu \ >From b3679f53f0d35984d16cbdeb6a90f16f135fd56f Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Thu, 25 Jan 2024 10:34:46 -0800 Subject: [PATCH 6/7] fixup! Fix documentation build warning --- llvm/docs/RISCVUsage.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index 1717f5f66c453..7003b6766dc7b 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -198,7 +198,7 @@ on support follow. ``Zvl16384b`` Supported ``Zvl32768b`` Supported ``Zvl65536b`` Supported - =============== ========================================================= + =============== ================================================================= Assembly Support LLVM supports the associated instructions in assembly. All assembly related tools (e.g. assembler, disassembler, llvm-objdump, etc..) are supported. Compiler and linker will accept extension names, and linked binaries will contain appropriate ELF flags and attributes to reflect use of named extension. >From 9a32093cde04ae761f479a0e8991805565dbc153 Mon Sep 17 00:00:00 2001 From: Craig Topper <craig.top...@sifive.com> Date: Thu, 1 Feb 2024 13:29:14 -0800 Subject: [PATCH 7/7] fixup! fix typos and improve description --- llvm/lib/Target/RISCV/RISCVFeatures.td | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index 6344c1a5411f4..6525176670c92 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -807,12 +807,14 @@ def FeatureStdExtSsccptr : SubtargetFeature<"ssccptr", "HasStdExtSsccptr", "true", "'Ssccptr' (Main memory supports page table reads)", []>; -def FeatureStdExtShcounterenvw +def FeatureStdExtShcounterenw : SubtargetFeature<"shcounterenw", "HasStdExtShcounterenw", "true", - "'Shcounterenw' (Support writeable enables for any supproted counter)", []>; -def FeatureStdExtSscounterenvw + "'Shcounterenw' (Support writeable hcounteren enable " + "bit for any hpmcounter that is not read-only zero)", []>; +def FeatureStdExtSscounterenw : SubtargetFeature<"sscounterenw", "HasStdExtSscounterenw", "true", - "'Sscounterenw' (Support writeable enables for any supproted counter)", []>; + "'Sscounterenw' (Support writeable scounteren enable " + "bit for any hpmcounter that is not read-only zero)", []>; def FeatureStdExtSsstateen : SubtargetFeature<"ssstateen", "HasStdExtSsstateen", "true", _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
