Author: Joseph Huber Date: 2024-01-29T14:09:34-06:00 New Revision: ea8014046c7f7c81f92d24832b873d356b2b6712
URL: https://github.com/llvm/llvm-project/commit/ea8014046c7f7c81f92d24832b873d356b2b6712 DIFF: https://github.com/llvm/llvm-project/commit/ea8014046c7f7c81f92d24832b873d356b2b6712.diff LOG: [NVPTX] Add builtin for 'exit' handling (#79777) Summary: The PTX ISA has always supported the 'exit' instruction to terminate individual threads. This patch adds a builtin to handle it. See the PTX documentation for further details. https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#control-flow-instructions-exit Added: Modified: clang/include/clang/Basic/BuiltinsNVPTX.def clang/test/CodeGen/builtins-nvptx.c llvm/include/llvm/IR/IntrinsicsNVVM.td llvm/lib/Target/NVPTX/NVPTXIntrinsics.td llvm/test/CodeGen/NVPTX/intrinsics.ll Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.def b/clang/include/clang/Basic/BuiltinsNVPTX.def index 4ce8cb111b5cb8..ed67f0877aee37 100644 --- a/clang/include/clang/Basic/BuiltinsNVPTX.def +++ b/clang/include/clang/Basic/BuiltinsNVPTX.def @@ -157,6 +157,7 @@ BUILTIN(__nvvm_read_ptx_sreg_pm3, "i", "n") // MISC BUILTIN(__nvvm_prmt, "UiUiUiUi", "") +BUILTIN(__nvvm_exit, "v", "r") TARGET_BUILTIN(__nvvm_nanosleep, "vi", "n", AND(SM_70, PTX63)) // Min Max diff --git a/clang/test/CodeGen/builtins-nvptx.c b/clang/test/CodeGen/builtins-nvptx.c index 6649e23fa9c4a7..4c2cca2f5af4ca 100644 --- a/clang/test/CodeGen/builtins-nvptx.c +++ b/clang/test/CodeGen/builtins-nvptx.c @@ -173,6 +173,13 @@ __device__ void activemask() { } +__device__ void exit() { + +// CHECK: call void @llvm.nvvm.exit() + + __nvvm_exit(); + +} // NVVM intrinsics diff --git a/llvm/include/llvm/IR/IntrinsicsNVVM.td b/llvm/include/llvm/IR/IntrinsicsNVVM.td index f81fe6d6e74ba8..e432f43f98a305 100644 --- a/llvm/include/llvm/IR/IntrinsicsNVVM.td +++ b/llvm/include/llvm/IR/IntrinsicsNVVM.td @@ -4813,4 +4813,8 @@ def int_nvvm_setmaxnreg_dec_sync_aligned_u32 [IntrConvergent, IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>], "llvm.nvvm.setmaxnreg.dec.sync.aligned.u32">; +// Exit +def int_nvvm_exit : ClangBuiltin<"__nvvm_exit">, + Intrinsic<[], [], [IntrConvergent, IntrInaccessibleMemOnly, IntrNoReturn]>; + } // let TargetPrefix = "nvvm" diff --git a/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td b/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td index c6f89f1e782992..87ae1ef6d738bf 100644 --- a/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td +++ b/llvm/lib/Target/NVPTX/NVPTXIntrinsics.td @@ -6844,4 +6844,7 @@ multiclass SET_MAXNREG<string Action, Intrinsic Intr> { defm INT_SET_MAXNREG_INC : SET_MAXNREG<"inc", int_nvvm_setmaxnreg_inc_sync_aligned_u32>; defm INT_SET_MAXNREG_DEC : SET_MAXNREG<"dec", int_nvvm_setmaxnreg_dec_sync_aligned_u32>; + } // isConvergent + +def INT_EXIT : NVPTXInst<(outs), (ins), "exit;", [(int_nvvm_exit)]>; diff --git a/llvm/test/CodeGen/NVPTX/intrinsics.ll b/llvm/test/CodeGen/NVPTX/intrinsics.ll index c09c7a72fd1018..4b7d5c8f239076 100644 --- a/llvm/test/CodeGen/NVPTX/intrinsics.ll +++ b/llvm/test/CodeGen/NVPTX/intrinsics.ll @@ -133,6 +133,13 @@ define i64 @test_clock64() { ret i64 %ret } +; CHECK-LABEL: test_exit +define void @test_exit() { +; CHECK: exit; + call void @llvm.nvvm.exit() + ret void +} + declare float @llvm.fabs.f32(float) declare double @llvm.fabs.f64(double) declare float @llvm.nvvm.sqrt.f(float) @@ -146,3 +153,4 @@ declare i64 @llvm.ctpop.i64(i64) declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() declare i32 @llvm.nvvm.read.ptx.sreg.clock() declare i64 @llvm.nvvm.read.ptx.sreg.clock64() +declare void @llvm.nvvm.exit() _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
