================ @@ -4212,6 +4213,89 @@ MachineSDNode *X86DAGToDAGISel::emitPCMPESTR(unsigned ROpc, unsigned MOpc, return CNode; } +// When the consumer of a right shift (arithmetic or logical) wouldn't +// notice the difference if the instruction was a rotate right instead +// (because the bits shifted in are truncated away), the shift can be +// replaced by the RORX instruction from BMI2. This doesn't set flags and +// can output to a different register. This increases code size in most +// cases, can have a false dependency when promoting the operand size, ---------------- topperc wrote:
Every Intel CPU that implements RORX renames AL, AX, EAX, and RAX together. Only the H registers can be separated. Converting an 8-bit read to a 16-bit read may create a false dependency on one of the H registers, but I'm not sure any of the other cases do. https://github.com/llvm/llvm-project/pull/77964 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
