https://github.com/bzEq updated https://github.com/llvm/llvm-project/pull/77557
>From e1caee46dc81e59b8eab0379e200ca2a709801c3 Mon Sep 17 00:00:00 2001
From: Kai Luo <lk...@cn.ibm.com>
Date: Wed, 10 Jan 2024 05:29:22 +0000
Subject: [PATCH 1/3] Alias
---
clang/lib/Basic/Targets/PPC.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 045c273f03c7a0..fa86d93b141180 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -803,7 +803,7 @@ const TargetInfo::GCCRegAlias
PPCTargetInfo::GCCRegAliases[] = {
{{"fr22"}, "f22"}, {{"fr23"}, "f23"}, {{"fr24"}, "f24"},
{{"fr25"}, "f25"}, {{"fr26"}, "f26"}, {{"fr27"}, "f27"},
{{"fr28"}, "f28"}, {{"fr29"}, "f29"}, {{"fr30"}, "f30"},
- {{"fr31"}, "f31"}, {{"cc"}, "cr0"},
+ {{"fr31"}, "f31"}, {{"cc"}, "cr0"}, {{"ca"}, "xer"},
};
ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
>From aaee97fb9f7bef5ff4e3f845fa29d45e9c7a83b0 Mon Sep 17 00:00:00 2001
From: Kai Luo <lk...@cn.ibm.com>
Date: Wed, 10 Jan 2024 05:56:27 +0000
Subject: [PATCH 2/3] CA aliasing to XER
---
clang/lib/Basic/Targets/PPC.cpp | 3 +++
clang/test/CodeGen/ppc-register-names.c | 14 ++++++++++++++
2 files changed, 17 insertions(+)
create mode 100644 clang/test/CodeGen/ppc-register-names.c
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index fa86d93b141180..abf685f8883971 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -782,6 +782,9 @@ ArrayRef<const char *> PPCTargetInfo::getGCCRegNames()
const {
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
// While some of these aliases do map to different registers
// they still share the same register name.
+ // Strictly speaking, "ca" is a subregister of "xer". However
+ // currently we don't model other bit fields of "xer", so treat
+ // "ca" aliasing to "xer".
{{"0"}, "r0"}, {{"1", "sp"}, "r1"}, {{"2"}, "r2"},
{{"3"}, "r3"}, {{"4"}, "r4"}, {{"5"}, "r5"},
{{"6"}, "r6"}, {{"7"}, "r7"}, {{"8"}, "r8"},
diff --git a/clang/test/CodeGen/ppc-register-names.c
b/clang/test/CodeGen/ppc-register-names.c
new file mode 100644
index 00000000000000..209488c2e5f1ae
--- /dev/null
+++ b/clang/test/CodeGen/ppc-register-names.c
@@ -0,0 +1,14 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang -target powerpc64le -c %s -mllvm -stop-after=finalize-isel -o -
| \
+// RUN: FileCheck %s
+// RUN: %clang -target powerpc64 -c %s -mllvm -stop-after=finalize-isel -o - |
\
+// RUN: FileCheck %s
+
+void test_function(void) {
+ asm volatile("":::"ca");
+ asm volatile("":::"xer");
+ // CHECK: call void asm sideeffect "", "~{xer}"()
+ // CHECK: call void asm sideeffect "", "~{xer}"()
+ // CHECK: INLINEASM &"", {{.*}} implicit-def early-clobber $xer
+ // CHECK: INLINEASM &"", {{.*}} implicit-def early-clobber $xer
+}
>From f871c97964ca600ad62f04993b93912203a8cd02 Mon Sep 17 00:00:00 2001
From: Kai Luo <lk...@cn.ibm.com>
Date: Wed, 10 Jan 2024 06:08:04 +0000
Subject: [PATCH 3/3] Adjust comment
---
clang/lib/Basic/Targets/PPC.cpp | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index abf685f8883971..01f58b57f6096f 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -782,9 +782,8 @@ ArrayRef<const char *> PPCTargetInfo::getGCCRegNames()
const {
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
// While some of these aliases do map to different registers
// they still share the same register name.
- // Strictly speaking, "ca" is a subregister of "xer". However
- // currently we don't model other bit fields of "xer", so treat
- // "ca" aliasing to "xer".
+ // Strictly speaking, "ca" is a subregister of "xer". However currently we
+ // don't model other bit fields of "xer", so treat "ca" aliased to "xer".
{{"0"}, "r0"}, {{"1", "sp"}, "r1"}, {{"2"}, "r2"},
{{"3"}, "r3"}, {{"4"}, "r4"}, {{"5"}, "r5"},
{{"6"}, "r6"}, {{"7"}, "r7"}, {{"8"}, "r8"},
@@ -806,7 +805,7 @@ const TargetInfo::GCCRegAlias
PPCTargetInfo::GCCRegAliases[] = {
{{"fr22"}, "f22"}, {{"fr23"}, "f23"}, {{"fr24"}, "f24"},
{{"fr25"}, "f25"}, {{"fr26"}, "f26"}, {{"fr27"}, "f27"},
{{"fr28"}, "f28"}, {{"fr29"}, "f29"}, {{"fr30"}, "f30"},
- {{"fr31"}, "f31"}, {{"cc"}, "cr0"}, {{"ca"}, "xer"},
+ {{"fr31"}, "f31"}, {{"cc"}, "cr0"}, {{"ca"}, "xer"},
};
ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
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