================
@@ -836,6 +837,70 @@ void ARMTargetInfo::getTargetDefines(const LangOptions
&Opts,
if (Opts.RWPI)
Builder.defineMacro("__ARM_RWPI", "1");
+ // Macros for enabling co-proc intrinsics
+ uint64_t FeatureCoprocBF = 0;
+ switch (ArchKind) {
+ default:
+ break;
+ case llvm::ARM::ArchKind::ARMV4:
+ // Filter __arm_ldcl and __arm_stcl in acle.h
+ FeatureCoprocBF = FEATURE_COPROC_B1;
+ break;
+ case llvm::ARM::ArchKind::ARM5T:
+ FeatureCoprocBF = isThumb() ? 0 : FEATURE_COPROC_B1;
+ break;
+ case llvm::ARM::ArchKind::ARMV5TE:
+ case llvm::ARM::ArchKind::ARMV5TEJ:
+ if (!isThumb())
+ FeatureCoprocBF =
+ FEATURE_COPROC_B1 | FEATURE_COPROC_B2 | FEATURE_COPROC_B3;
+ break;
+ case llvm::ARM::ArchKind::ARMV6:
+ case llvm::ARM::ArchKind::ARMV6K:
+ case llvm::ARM::ArchKind::ARMV6KZ:
+ case llvm::ARM::ArchKind::ARMV6T2:
+ if (!isThumb() || ArchKind == llvm::ARM::ArchKind::ARMV6T2)
+ FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+ FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+ break;
+ case llvm::ARM::ArchKind::ARMV7A:
+ case llvm::ARM::ArchKind::ARMV7R:
+ case llvm::ARM::ArchKind::ARMV7M:
+ case llvm::ARM::ArchKind::ARMV7S:
+ case llvm::ARM::ArchKind::ARMV7EM:
+ FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+ FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+ break;
+ case llvm::ARM::ArchKind::ARMV8A:
+ case llvm::ARM::ArchKind::ARMV8R:
+ case llvm::ARM::ArchKind::ARMV8_1A:
+ case llvm::ARM::ArchKind::ARMV8_2A:
+ case llvm::ARM::ArchKind::ARMV8_3A:
+ case llvm::ARM::ArchKind::ARMV8_4A:
+ case llvm::ARM::ArchKind::ARMV8_5A:
+ case llvm::ARM::ArchKind::ARMV8_6A:
+ case llvm::ARM::ArchKind::ARMV8_7A:
+ case llvm::ARM::ArchKind::ARMV8_8A:
+ case llvm::ARM::ArchKind::ARMV8_9A:
+ // Filter __arm_cdp, __arm_ldcl, __arm_stcl in arm_acle.h
+ FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B3;
+ break;
+ case llvm::ARM::ArchKind::ARMV8MMainline:
+ FeatureCoprocBF = FEATURE_COPROC_B1 | FEATURE_COPROC_B2 |
+ FEATURE_COPROC_B3 | FEATURE_COPROC_B4;
+ break;
+ case llvm::ARM::ArchKind::ARMV9A:
+ case llvm::ARM::ArchKind::ARMV9_1A:
+ case llvm::ARM::ArchKind::ARMV9_2A:
+ case llvm::ARM::ArchKind::ARMV9_3A:
+ case llvm::ARM::ArchKind::ARMV9_4A:
----------------
hstk30-hw wrote:
We need defined ARMV9_5A in ARMTargetParser.def first.
https://github.com/llvm/llvm-project/pull/75440
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