llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-arm @llvm/pr-subscribers-clang Author: Jonathan Thackray (jthackray) <details> <summary>Changes</summary> Neoverse-N2 was incorrectly marked as an Armv8.5a core. This has been changed to an Armv9.0a core. However, crypto options are not enabled by default for Armv9 cores, so `-mcpu=neoverse-n2+crypto` is required to enable crypto for this core. --- Full diff: https://github.com/llvm/llvm-project/pull/75055.diff 8 Files Affected: - (modified) clang/test/Driver/arm-cortex-cpus-2.c (+1-1) - (modified) llvm/docs/ReleaseNotes.rst (+5) - (modified) llvm/include/llvm/TargetParser/AArch64TargetParser.h (+2-3) - (modified) llvm/include/llvm/TargetParser/ARMTargetParser.def (+1-1) - (modified) llvm/lib/Target/AArch64/AArch64.td (+2-2) - (modified) llvm/lib/Target/ARM/ARM.td (+1-1) - (modified) llvm/test/CodeGen/AArch64/misched-fusion-aes.ll (-1) - (modified) llvm/unittests/TargetParser/TargetParserTest.cpp (+4-6) ``````````diff diff --git a/clang/test/Driver/arm-cortex-cpus-2.c b/clang/test/Driver/arm-cortex-cpus-2.c index 4bf2b3a50412d..c322303d22786 100644 --- a/clang/test/Driver/arm-cortex-cpus-2.c +++ b/clang/test/Driver/arm-cortex-cpus-2.c @@ -566,7 +566,7 @@ // CHECK-CORTEX-M52: "-cc1"{{.*}} "-triple" "thumbv8.1m.main-{{.*}} "-target-cpu" "cortex-m52" // RUN: %clang -target arm -mcpu=neoverse-n2 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-NEOVERSE-N2 %s -// CHECK-NEOVERSE-N2: "-cc1"{{.*}} "-triple" "armv8.5a-{{.*}}" "-target-cpu" "neoverse-n2" +// CHECK-NEOVERSE-N2: "-cc1"{{.*}} "-triple" "armv9a-{{.*}}" "-target-cpu" "neoverse-n2" // ================== Check whether -mcpu accepts mixed-case values. // RUN: %clang -target arm-linux-gnueabi -mcpu=Cortex-a5 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CASE-INSENSITIVE-CPUV7A %s diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 6b70146efe824..707d422342b2b 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -94,6 +94,11 @@ Changes to the AArch64 Backend * Added support for Cortex-A520, Cortex-A720 and Cortex-X4 CPUs. +* Neoverse-N2 was incorrectly marked as an Armv8.5a core. This has been + changed to an Armv9.0a core. However, crypto options are not enabled + by default for Armv9 cores, so `-mcpu=neoverse-n2+crypto` is required + to enable crypto for this core. + Changes to the AMDGPU Backend ----------------------------- diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h index 17cafd146b0e7..56c32fae712ce 100644 --- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h +++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h @@ -536,10 +536,9 @@ inline constexpr CpuInfo CpuInfos[] = { {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, AArch64::AEK_PROFILE, AArch64::AEK_RCPC, AArch64::AEK_SSBS}))}, - {"neoverse-n2", ARMV8_5A, + {"neoverse-n2", ARMV9A, (AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, - AArch64::AEK_SM4, AArch64::AEK_BF16, AArch64::AEK_DOTPROD, + {AArch64::AEK_BF16, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, AArch64::AEK_I8MM, AArch64::AEK_MTE, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM}))}, diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def index 558b6f127de3f..c520ab898cb90 100644 --- a/llvm/include/llvm/TargetParser/ARMTargetParser.def +++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def @@ -340,7 +340,7 @@ ARM_CPU_NAME("cortex-x1c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) -ARM_CPU_NAME("neoverse-n2", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false, +ARM_CPU_NAME("neoverse-n2", ARMV9A, FK_NEON_FP_ARMV8, false, (ARM::AEK_BF16 | ARM::AEK_DOTPROD | ARM::AEK_I8MM | ARM::AEK_RAS | ARM::AEK_SB)) ARM_CPU_NAME("neoverse-v1", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index ff256c9a8ccdf..c600bcaab2b3e 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -1480,9 +1480,9 @@ def ProcessorFeatures { FeatureFPARMv8, FeatureFullFP16, FeatureNEON, FeatureRCPC, FeatureSPE, FeatureSSBS, FeaturePerfMon]; - list<SubtargetFeature> NeoverseN2 = [HasV8_5aOps, FeatureBF16, FeatureETE, + list<SubtargetFeature> NeoverseN2 = [HasV9_0aOps, FeatureBF16, FeatureETE, FeatureMatMulInt8, FeatureMTE, FeatureSVE2, - FeatureSVE2BitPerm, FeatureTRBE, FeatureCrypto, + FeatureSVE2BitPerm, FeatureTRBE, FeaturePerfMon]; list<SubtargetFeature> Neoverse512TVB = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 3df428b9ce967..97d1444a553eb 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -1662,7 +1662,7 @@ def : ProcNoItin<"neoverse-n1", [ARMv82a, FeatureCRC, FeatureDotProd]>; -def : ProcNoItin<"neoverse-n2", [ARMv85a, +def : ProcNoItin<"neoverse-n2", [ARMv9a, FeatureBF16, FeatureMatMulInt8]>; diff --git a/llvm/test/CodeGen/AArch64/misched-fusion-aes.ll b/llvm/test/CodeGen/AArch64/misched-fusion-aes.ll index 6ee3cb4892852..ee3e808f9f921 100644 --- a/llvm/test/CodeGen/AArch64/misched-fusion-aes.ll +++ b/llvm/test/CodeGen/AArch64/misched-fusion-aes.ll @@ -12,7 +12,6 @@ ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=cortex-x1 | FileCheck %s ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-e1 | FileCheck %s ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n1 | FileCheck %s -; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-n2 | FileCheck %s ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-v1 | FileCheck %s ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=neoverse-512tvb | FileCheck %s ; RUN: llc %s -o - -mtriple=aarch64-unknown -mcpu=exynos-m3 | FileCheck %s diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index acd0b9b9d65cb..687b56cc5aa20 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -416,13 +416,13 @@ INSTANTIATE_TEST_SUITE_P( ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), - ARMCPUTestParams<uint64_t>("neoverse-n2", "armv8.5-a", "crypto-neon-fp-armv8", + ARMCPUTestParams<uint64_t>("neoverse-n2", "armv9-a", "neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_HWDIVTHUMB | ARM::AEK_HWDIVARM | ARM::AEK_MP | ARM::AEK_SEC | ARM::AEK_VIRT | ARM::AEK_DSP | ARM::AEK_BF16 | ARM::AEK_DOTPROD | ARM::AEK_RAS | ARM::AEK_I8MM | ARM::AEK_SB, - "8.5-A"), + "9-A"), ARMCPUTestParams<uint64_t>("neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8", ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | @@ -1521,11 +1521,9 @@ INSTANTIATE_TEST_SUITE_P( AArch64::AEK_SSBS})), "8.2-A"), ARMCPUTestParams<AArch64::ExtensionBitset>( - "neoverse-n2", "armv8.5-a", "crypto-neon-fp-armv8", + "neoverse-n2", "armv9-a", "crypto-neon-fp-armv8", (AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_SHA3, - AArch64::AEK_SM4, AArch64::AEK_FP, + {AArch64::AEK_CRC, AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_FP16, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_SVE, AArch64::AEK_DOTPROD, `````````` </details> https://github.com/llvm/llvm-project/pull/75055 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
