DavidSpickett wrote: Going by the page (didn't see a link to a manual, maybe I missed it), MVE and FPU are optional.
"Optional Helium technology (M-profile Vector Extension) supporting up to:" "Optional FPU with support for half precision (fp16), single precision (fp32) and double precision (fp64) floating-point operations." Is this following a pattern from previous CPUs where these things are optional, but users are expected to pass `+nomve` etc. to disable them? (I don't disagree with that, just want to keep it consistent) https://github.com/llvm/llvm-project/pull/74822 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
