================ @@ -864,6 +865,17 @@ supported for the ``amdgcn`` target. (bits `127:96`). The specific interpretation of these fields varies by the target architecture and is detailed in the ISA descriptions. +**Buffer Strided Pointer** + The buffer index pointer is an experimental address space. It is supposed to + model a 128-bit buffer descriptor and a 32-bit offset, like the **Buffer Fat + Pointer**. Additionally, it contains an index into the descriptor, which ---------------- nhaehnle wrote:
index into the **buffer** https://github.com/llvm/llvm-project/pull/74471 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
