================
@@ -2119,6 +2119,21 @@ let TargetGuard = "sme2" in {
// 2-way and 4-way selects
def SVSEL_X2 : SInst<"svsel[_{d}_x2]", "2}22", "cUcsUsiUilUlbhfd",
MergeNone, "aarch64_sve_sel_x2", [IsStreaming], []>;
def SVSEL_X4 : SInst<"svsel[_{d}_x4]", "4}44", "cUcsUsiUilUlbhfd",
MergeNone, "aarch64_sve_sel_x4", [IsStreaming], []>;
+
+ def SVQRSHRN_X4 : SInst<"svqrshrn[_{0}_{d}_x4]", "q4i", "il", MergeNone,
"aarch64_sve_sqrshrn_x4", [IsStreaming], [ImmCheck<1, ImmCheckShiftRight, 0>]>;
----------------
sdesmalen-arm wrote:
The builtins proposed here do not match the latest spec, for example this
[svqrshrn](https://github.com/ARM-software/acle/blob/main/main/acle.md#sqrshrn-uqrshrn)
https://github.com/llvm/llvm-project/pull/74100
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