================
@@ -2746,19 +2746,25 @@ AArch64TargetLowering::EmitFill(MachineInstr &MI,
MachineBasicBlock *BB) const {
return BB;
}
-MachineBasicBlock *AArch64TargetLowering::EmitZTSpillFill(MachineInstr &MI,
- MachineBasicBlock
*BB,
- bool IsSpill) const {
+MachineBasicBlock *AArch64TargetLowering::EmitZTInstr(MachineInstr &MI,
+ MachineBasicBlock *BB,
+ unsigned Opcode,
+ bool IsZTDest) const {
const TargetInstrInfo *TII = Subtarget->getInstrInfo();
MachineInstrBuilder MIB;
- if (IsSpill) {
- MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::STR_TX));
- MIB.addReg(MI.getOperand(0).getReg());
- } else
- MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(AArch64::LDR_TX),
+
+ if (IsZTDest)
+ MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Opcode),
MI.getOperand(0).getReg());
- MIB.add(MI.getOperand(1)); // Base
- MI.eraseFromParent(); // The pseudo is gone now.
+ else {
+ MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Opcode));
+ MIB.addReg(MI.getOperand(0).getReg());
+ }
+
+ for (unsigned I = 1; I < MI.getNumOperands(); ++I)
+ MIB.add(MI.getOperand(I));
----------------
MDevereau wrote:
I've rebased this patch which includes a refactor of this function from
5fe7ae8. Your suggestion is still an improve to that though so I've added it.
https://github.com/llvm/llvm-project/pull/72274
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