================
@@ -8,7 +8,7 @@
 // CHECK-C-LABEL: @test_svldr_vnum_za(
 // CHECK-CXX-LABEL: @_Z18test_svldr_vnum_zajPKv(
 // CHECK-NEXT:  entry:
-// CHECK-NEXT:    tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], 
ptr [[PTR:%.*]])
----------------
kmclaughlin-arm wrote:

Were these changes to SLICE_BASE and PTR intentional? When I try to run this 
test now it fails with the following:
`undefined variable: SLICE_BASE` &
`undefined variable: PTR`

https://github.com/llvm/llvm-project/pull/68565
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