https://github.com/chenzheng1030 created https://github.com/llvm/llvm-project/pull/68476
Extend `PPCTargetInfo::getGCCAddlRegNames()` to aix as well. The definition should be common between Linux PPC and AIX PPC. I also use "abi" as the ABI name for AIX ABI. This aligns with LLVM PPCSubtarget: ``` bool isAIXABI() const { return TargetTriple.isOSAIX(); } bool isSVR4ABI() const { return !isAIXABI(); } bool isELFv2ABI() const; ``` >From eada8d170cefcf2c1d152eaadc68dc4c3077c9ce Mon Sep 17 00:00:00 2001 From: Chen Zheng <czhen...@cn.ibm.com> Date: Sat, 7 Oct 2023 06:09:44 -0400 Subject: [PATCH] [AIX] recognize vsr in inline asm for AIX --- clang/lib/Basic/Targets/PPC.cpp | 3 ++- clang/lib/Basic/Targets/PPC.h | 3 ++- clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c | 4 ++++ 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index e0abc069032e1ce..fa56d39fd2fdada 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -807,6 +807,7 @@ ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const { // PPC ELFABIv2 DWARF Definitoin "Table 2.26. Mappings of Common Registers". // vs0 ~ vs31 is mapping to 32 - 63, // vs32 ~ vs63 is mapping to 77 - 108. +// And this mapping applies to all OSes which runs on powerpc. const TargetInfo::AddlRegName GCCAddlRegNames[] = { // Table of additional register names to use in user input. {{"vs0"}, 32}, {{"vs1"}, 33}, {{"vs2"}, 34}, {{"vs3"}, 35}, @@ -828,7 +829,7 @@ const TargetInfo::AddlRegName GCCAddlRegNames[] = { }; ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const { - if (ABI == "elfv2") + if (ABI == "elfv2" || ABI == "aix") return llvm::ArrayRef(GCCAddlRegNames); else return TargetInfo::getGCCAddlRegNames(); diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index ef667b3d511f0e6..c2a18d77a60a510 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -385,6 +385,7 @@ class LLVM_LIBRARY_VISIBILITY PPC32TargetInfo : public PPCTargetInfo { LongDoubleWidth = 64; LongDoubleAlign = DoubleAlign = 32; LongDoubleFormat = &llvm::APFloat::IEEEdouble(); + ABI = "aix"; break; default: break; @@ -418,11 +419,11 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public PPCTargetInfo { std::string DataLayout; if (Triple.isOSAIX()) { - // TODO: Set appropriate ABI for AIX platform. DataLayout = "E-m:a-Fi64-i64:64-n32:64"; LongDoubleWidth = 64; LongDoubleAlign = DoubleAlign = 32; LongDoubleFormat = &llvm::APFloat::IEEEdouble(); + ABI = "aix"; } else if ((Triple.getArch() == llvm::Triple::ppc64le)) { DataLayout = "e-m:e-Fn32-i64:64-n32:64"; ABI = "elfv2"; diff --git a/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c b/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c index a4fabd688175e14..a8033f22073cc9f 100644 --- a/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c +++ b/clang/test/CodeGen/PowerPC/inline-asm-matching-ppc-vsx.c @@ -2,6 +2,10 @@ // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-feature +vsx \ // RUN: -target-cpu pwr9 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple powerpc64-ibm-aix -target-feature +vsx \ +// RUN: -target-cpu pwr9 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple powerpc-ibm-aix -target-feature +vsx \ +// RUN: -target-cpu pwr9 -emit-llvm %s -o - | FileCheck %s // This case is to test VSX register support in the clobbers list for inline asm. void testVSX (void) { _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits