================
@@ -145,9 +160,92 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX.
- if (!IsTLSTPRelMI) {
+ if (MI.getOpcode() == PPC::TLSLDAIX8 ||
+ MI.getOpcode() == PPC::TLSLDAIX) {
+ // It is better to put TLSLDAIX node before LoadOffsetToc node,
+ // because LoadOffsetToc node can use clobbers r4/r5. Search for
the
+ // first paired LoadOffsetToc node within the same BB.
+ const PPCSubtarget &Subtarget =
+ MBB.getParent()->getSubtarget<PPCSubtarget>();
+ bool IsLargeModel =
+ Subtarget.getTargetMachine().getCodeModel() ==
CodeModel::Large;
+ unsigned LDTocOp =
+ Is64Bit ? (IsLargeModel ? PPC::LDtocL : PPC::LDtoc)
+ : (IsLargeModel ? PPC::LWZtocL : PPC::LWZtoc);
+ MachineBasicBlock::iterator Anchor = I;
+ if (!RegInfo.use_empty(OutReg)) {
+ std::set<MachineInstr *> Uses;
+ // Collect all instructions that use OutReg
+ for (MachineOperand &MO : RegInfo.use_operands(OutReg)) {
+ if (Uses.count(MO.getParent()))
+ continue;
+ Uses.insert(MO.getParent());
+ }
+ // Find the first Add within current BB.
+ MachineBasicBlock::iterator UseIter = MBB.begin();
+ for (MachineBasicBlock::iterator AE = MBB.end(); UseIter != AE;
+ ++UseIter)
+ if (Uses.count(&*UseIter))
+ break;
+
+ if (UseIter != MBB.end()) {
+ // Get the instruction that defines the other used register
+ // operand of UseIter. The match pattern is that: UseIter has
+ // exactly one used-operand defined by LDTocOp
+ // (LDtocL/LDtoc/LWZtocL/LWZtoc).
+ MachineInstr *LoadOffsetToc = nullptr;
+ int MatchCount = 0;
+ for (MachineOperand &MO : UseIter->operands()) {
+ if (MO.isReg() && MO.isUse()) {
+ if (RegInfo.hasOneDef(MO.getReg())) {
----------------
orcguru wrote:
Updated. Thanks!
https://github.com/llvm/llvm-project/pull/66316
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