================
@@ -898,6 +910,53 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V,
APInt DemandedMask,
}
break;
}
+ case Intrinsic::ptrmask: {
+ // Fail loudly in case this is ever changed.
+ // Likely not much needs to be changed here to support vector types.
+ assert(!I->getOperand(0)->getType()->isVectorTy() &&
+ !I->getOperand(1)->getType()->isVectorTy() &&
+ "These simplifications where written at a time when ptrmask did
"
+ "not support vector types and may not work for vectors");
+
+ unsigned MaskWidth =
I->getOperand(1)->getType()->getScalarSizeInBits();
+ RHSKnown = KnownBits(MaskWidth);
+ // If either the LHS or the RHS are Zero, the result is zero.
+ if (SimplifyDemandedBits(I, 0, DemandedMask, LHSKnown, Depth + 1) ||
+ SimplifyDemandedBits(
+ I, 1, (DemandedMask & ~LHSKnown.Zero).zextOrTrunc(MaskWidth),
+ RHSKnown, Depth + 1))
+ return I;
+
+ RHSKnown = RHSKnown.zextOrTrunc(BitWidth);
+ assert(!RHSKnown.hasConflict() && "Bits known to be one AND zero?");
+ assert(!LHSKnown.hasConflict() && "Bits known to be one AND zero?");
+
+ Known = LHSKnown & RHSKnown;
+ KnownBitsComputed = DemandedMask.isAllOnes();
----------------
nikic wrote:
This should always be true.
https://github.com/llvm/llvm-project/pull/67166
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