jmciver created this revision.
Herald added subscribers: luismarques, jdoerfert, arichardson.
Herald added a project: All.
jmciver retitled this revision from "WIP: [UpdateTestChecks] Add update test
check support for freeze_bits metadata
Part of a sequence of exploratory patches using poison semantics for
uninitialized memory." to "WIP: [UpdateTestChecks] Add update test check
support for freeze_bits metadata".
jmciver edited the summary of this revision.
jmciver added a subscriber: nlopes.
jmciver edited the summary of this revision.
jmciver published this revision for review.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.
Part of a sequence of exploratory patches using poison semantics for
uninitialized memory.
Add freeze_bits metadata support to update test check utilities.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D158343
Files:
clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.funcattrs.expected
clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.plain.expected
clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected
clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
clang/test/utils/update_cc_test_checks/Inputs/generated-funcs-regex.c.expected
clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.expected
clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.expected
clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.v2.expected
clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.v2.expected
clang/test/utils/update_cc_test_checks/Inputs/resolve-tmp-conflict.cpp.expected
llvm/utils/UpdateTestChecks/common.py
Index: llvm/utils/UpdateTestChecks/common.py
===================================================================
--- llvm/utils/UpdateTestChecks/common.py
+++ llvm/utils/UpdateTestChecks/common.py
@@ -980,6 +980,7 @@
),
NamelessValue(r"DBG", "!", r"!dbg ", r"![0-9]+", None),
NamelessValue(r"DIASSIGNID", "!", r"!DIAssignID ", r"![0-9]+", None),
+ NamelessValue(r'FREEZE_BITS', '!', r'!freeze_bits ', r'![0-9]+', None),
NamelessValue(r"PROF", "!", r"!prof ", r"![0-9]+", None),
NamelessValue(r"TBAA", "!", r"!tbaa ", r"![0-9]+", None),
NamelessValue(r"TBAA_STRUCT", "!", r"!tbaa.struct ", r"![0-9]+", None),
Index: clang/test/utils/update_cc_test_checks/Inputs/resolve-tmp-conflict.cpp.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/resolve-tmp-conflict.cpp.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/resolve-tmp-conflict.cpp.expected
@@ -12,8 +12,8 @@
// CHECK-NEXT: store ptr [[A_ADDR]], ptr [[_TMP0]], align 8
// CHECK-NEXT: store i32 1, ptr [[REF_TMP]], align 4
// CHECK-NEXT: store ptr [[REF_TMP]], ptr [[_TMP1]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[_TMP1]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[_TMP1]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: store i32 [[TMP0]], ptr [[TMP1]], align 4
// CHECK-NEXT: ret void
//
Index: clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.v2.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.v2.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.v2.expected
@@ -9,8 +9,8 @@
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
// CHECK-NEXT: ret i64 [[ADD]]
@@ -29,11 +29,11 @@
// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4
// CHECK-NEXT: store i32 [[C]], ptr [[C_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
-// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ADD2:%.*]] = add nsw i64 [[ADD]], [[CONV1]]
// CHECK-NEXT: ret i64 [[ADD2]]
Index: clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.v2.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.v2.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.v2.expected
@@ -9,8 +9,8 @@
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
// CHECK-NEXT: ret i64 [[ADD]]
@@ -29,11 +29,11 @@
// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4
// CHECK-NEXT: store i32 [[C]], ptr [[C_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
-// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ADD2:%.*]] = add nsw i64 [[ADD]], [[CONV1]]
// CHECK-NEXT: ret i64 [[ADD2]]
Index: clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
@@ -9,8 +9,8 @@
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
// CHECK-NEXT: ret i64 [[ADD]]
@@ -29,11 +29,11 @@
// CHECK-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B]], ptr [[B_ADDR]], align 4
// CHECK-NEXT: store i32 [[C]], ptr [[C_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
-// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ADD2:%.*]] = add nsw i64 [[ADD]], [[CONV1]]
// CHECK-NEXT: ret i64 [[ADD2]]
Index: clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/mangled_names.c.expected
@@ -8,8 +8,8 @@
// CHECK-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B:%.*]], ptr [[B_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
// CHECK-NEXT: ret i64 [[ADD]]
@@ -27,11 +27,11 @@
// CHECK-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
// CHECK-NEXT: store i32 [[B:%.*]], ptr [[B_ADDR]], align 4
// CHECK-NEXT: store i32 [[C:%.*]], ptr [[C_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP1]] to i64
// CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP0]], [[CONV]]
-// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[C_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[TMP2]] to i64
// CHECK-NEXT: [[ADD2:%.*]] = add nsw i64 [[ADD]], [[CONV1]]
// CHECK-NEXT: ret i64 [[ADD2]]
Index: clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.no-generated.expected
@@ -28,20 +28,20 @@
// NOOMP-NEXT: store i32 0, ptr [[I]], align 4
// NOOMP-NEXT: br label [[FOR_COND:%.*]]
// NOOMP: for.cond:
-// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
// NOOMP-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 33554432
// NOOMP-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
// NOOMP: for.body:
-// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
// NOOMP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [33554432 x double], ptr @A, i64 0, i64 [[IDXPROM]]
// NOOMP-NEXT: store double 0.000000e+00, ptr [[ARRAYIDX]], align 8
// NOOMP-NEXT: br label [[FOR_INC:%.*]]
// NOOMP: for.inc:
-// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// NOOMP-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
// NOOMP: for.end:
// NOOMP-NEXT: call void @foo()
// NOOMP-NEXT: ret i32 0
@@ -73,20 +73,20 @@
// NOOMP-NEXT: store i32 0, ptr [[I]], align 4
// NOOMP-NEXT: br label [[FOR_COND:%.*]]
// NOOMP: for.cond:
-// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 33554432
// NOOMP-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
// NOOMP: for.body:
-// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
// NOOMP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [33554432 x double], ptr @A, i64 0, i64 [[IDXPROM]]
// NOOMP-NEXT: store double 1.000000e+00, ptr [[ARRAYIDX]], align 8
// NOOMP-NEXT: br label [[FOR_INC:%.*]]
// NOOMP: for.inc:
-// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// NOOMP-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
+// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
// NOOMP: for.end:
// NOOMP-NEXT: ret void
//
Index: clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/generated-funcs.c.generated.expected
@@ -58,34 +58,34 @@
// OMP-NEXT: store i32 33554431, ptr [[DOTOMP_UB]], align 4
// OMP-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// OMP-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// OMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !freeze_bits [[FREEZE_BITS3:![0-9]+]]
+// OMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 33554431
// OMP-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
// OMP: cond.true:
// OMP-NEXT: br label [[COND_END:%.*]]
// OMP: cond.false:
-// OMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: br label [[COND_END]]
// OMP: cond.end:
// OMP-NEXT: [[COND:%.*]] = phi i32 [ 33554431, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
// OMP-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// OMP-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// OMP: omp.inner.for.cond:
-// OMP-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !freeze_bits [[FREEZE_BITS3]]
+// OMP-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
// OMP-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// OMP: omp.inner.for.body:
-// OMP-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
// OMP-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// OMP-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
+// OMP-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP8]] to i64
// OMP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [33554432 x double], ptr @A, i64 0, i64 [[IDXPROM]]
// OMP-NEXT: store double 0.000000e+00, ptr [[ARRAYIDX]], align 8
@@ -93,7 +93,7 @@
// OMP: omp.body.continue:
// OMP-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// OMP: omp.inner.for.inc:
-// OMP-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
// OMP-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
// OMP-NEXT: br label [[OMP_INNER_FOR_COND]]
@@ -129,34 +129,34 @@
// OMP-NEXT: store i32 33554431, ptr [[DOTOMP_UB]], align 4
// OMP-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
// OMP-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-// OMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
-// OMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
+// OMP-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !freeze_bits [[FREEZE_BITS3]]
+// OMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
-// OMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 33554431
// OMP-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
// OMP: cond.true:
// OMP-NEXT: br label [[COND_END:%.*]]
// OMP: cond.false:
-// OMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: br label [[COND_END]]
// OMP: cond.end:
// OMP-NEXT: [[COND:%.*]] = phi i32 [ 33554431, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
// OMP-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-// OMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+// OMP-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
// OMP-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
// OMP: omp.inner.for.cond:
-// OMP-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
-// OMP-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+// OMP-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !freeze_bits [[FREEZE_BITS3]]
+// OMP-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
// OMP-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
// OMP: omp.inner.for.body:
-// OMP-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
// OMP-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
// OMP-NEXT: store i32 [[ADD]], ptr [[I]], align 4
-// OMP-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4
+// OMP-NEXT: [[TMP8:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP8]] to i64
// OMP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [33554432 x double], ptr @A, i64 0, i64 [[IDXPROM]]
// OMP-NEXT: store double 1.000000e+00, ptr [[ARRAYIDX]], align 8
@@ -164,7 +164,7 @@
// OMP: omp.body.continue:
// OMP-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
// OMP: omp.inner.for.inc:
-// OMP-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
+// OMP-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !freeze_bits [[FREEZE_BITS3]]
// OMP-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
// OMP-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
// OMP-NEXT: br label [[OMP_INNER_FOR_COND]]
@@ -184,20 +184,20 @@
// NOOMP-NEXT: store i32 0, ptr [[I]], align 4
// NOOMP-NEXT: br label [[FOR_COND:%.*]]
// NOOMP: for.cond:
-// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
// NOOMP-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 33554432
// NOOMP-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
// NOOMP: for.body:
-// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
// NOOMP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [33554432 x double], ptr @A, i64 0, i64 [[IDXPROM]]
// NOOMP-NEXT: store double 0.000000e+00, ptr [[ARRAYIDX]], align 8
// NOOMP-NEXT: br label [[FOR_INC:%.*]]
// NOOMP: for.inc:
-// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// NOOMP-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
+// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
// NOOMP: for.end:
// NOOMP-NEXT: call void @foo()
// NOOMP-NEXT: ret i32 0
@@ -210,20 +210,20 @@
// NOOMP-NEXT: store i32 0, ptr [[I]], align 4
// NOOMP-NEXT: br label [[FOR_COND:%.*]]
// NOOMP: for.cond:
-// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 33554432
// NOOMP-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
// NOOMP: for.body:
-// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
// NOOMP-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [33554432 x double], ptr @A, i64 0, i64 [[IDXPROM]]
// NOOMP-NEXT: store double 1.000000e+00, ptr [[ARRAYIDX]], align 8
// NOOMP-NEXT: br label [[FOR_INC:%.*]]
// NOOMP: for.inc:
-// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
+// NOOMP-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4, !freeze_bits [[FREEZE_BITS2]]
// NOOMP-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
// NOOMP-NEXT: store i32 [[INC]], ptr [[I]], align 4
-// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
+// NOOMP-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
// NOOMP: for.end:
// NOOMP-NEXT: ret void
//
Index: clang/test/utils/update_cc_test_checks/Inputs/generated-funcs-regex.c.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/generated-funcs-regex.c.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/generated-funcs-regex.c.expected
@@ -18,9 +18,9 @@
// CHECK-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
// CHECK-NEXT: %{{somevar_[a-z0-9]+_}} = alloca i32, align 4
// CHECK-NEXT: store i32 [[A:%.*]], ptr [[A_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4, !freeze_bits [[FREEZE_BITS3:![0-9]+]]
// CHECK-NEXT: store i32 [[TMP0]], ptr [[A_CASTED]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8, !freeze_bits [[FREEZE_BITS3]]
// CHECK-NEXT: call void @{{__omp_offloading_[a-z0-9]+_[a-z0-9]+_foo_l[0-9]+}}(i64 [[TMP1]]) #[[ATTR3:[0-9]+]]
// CHECK-NEXT: call void @{{__test_offloading_[a-z0-9]+_[a-z0-9]+_bar_l[0-9]+}}()
// CHECK-NEXT: ret void
@@ -30,7 +30,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK-NEXT: store i64 [[A:%.*]], ptr [[A_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4, !freeze_bits [[FREEZE_BITS3]]
// CHECK-NEXT: call void @use(i32 noundef [[TMP0]])
// CHECK-NEXT: ret void
//
Index: clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/explicit-template-instantiation.cpp.expected
@@ -42,8 +42,8 @@
// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i8, align 1
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i8 [[X:%.*]], ptr [[X_ADDR]], align 1
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[X_ADDR]], align 1
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[X_ADDR]], align 1, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooIcEC2Ec(ptr noundef nonnull align 1 dereferenceable(1) [[THIS1]], i8 noundef signext [[TMP0]])
// CHECK-NEXT: ret void
//
@@ -51,7 +51,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooIcED2Ev(ptr noundef nonnull align 1 dereferenceable(1) [[THIS1]]) #[[ATTR2:[0-9]+]]
// CHECK-NEXT: ret void
//
@@ -59,9 +59,9 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[X]], align 1
+// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[X]], align 1, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: ret i8 [[TMP0]]
//
// CHECK-LABEL: @_ZN3FooIcE3setEc(
@@ -70,8 +70,8 @@
// CHECK-NEXT: [[_X_ADDR:%.*]] = alloca i8, align 1
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i8 [[_X:%.*]], ptr [[_X_ADDR]], align 1
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[_X_ADDR]], align 1
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[_X_ADDR]], align 1, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK-NEXT: store i8 [[TMP0]], ptr [[X]], align 1
// CHECK-NEXT: ret void
@@ -84,8 +84,8 @@
// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i16, align 2
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i16 [[X:%.*]], ptr [[X_ADDR]], align 2
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[X_ADDR]], align 2
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[X_ADDR]], align 2, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooIsEC2Es(ptr noundef nonnull align 2 dereferenceable(2) [[THIS1]], i16 noundef signext [[TMP0]])
// CHECK-NEXT: ret void
//
@@ -93,7 +93,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooIsED2Ev(ptr noundef nonnull align 2 dereferenceable(2) [[THIS1]]) #[[ATTR2]]
// CHECK-NEXT: ret void
//
@@ -101,9 +101,9 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_FOO_0:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[X]], align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[X]], align 2, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: ret i16 [[TMP0]]
//
// CHECK-LABEL: @_ZN3FooIsE3setEs(
@@ -112,8 +112,8 @@
// CHECK-NEXT: [[_X_ADDR:%.*]] = alloca i16, align 2
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i16 [[_X:%.*]], ptr [[_X_ADDR]], align 2
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[_X_ADDR]], align 2
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[_X_ADDR]], align 2, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[STRUCT_FOO_0:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK-NEXT: store i16 [[TMP0]], ptr [[X]], align 2
// CHECK-NEXT: ret void
@@ -129,8 +129,8 @@
// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i32 [[X:%.*]], ptr [[X_ADDR]], align 4
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3BarIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
// CHECK-NEXT: ret void
//
@@ -138,7 +138,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3BarIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR2]]
// CHECK-NEXT: ret void
//
@@ -146,7 +146,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[FOO:%.*]] = getelementptr inbounds [[STRUCT_BAR:%.*]], ptr [[THIS1]], i32 0, i32 0
// CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN3FooIiE3getEv(ptr noundef nonnull align 4 dereferenceable(4) [[FOO]])
// CHECK-NEXT: ret i32 [[CALL]]
@@ -157,9 +157,9 @@
// CHECK-NEXT: [[_X_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i32 [[_X:%.*]], ptr [[_X_ADDR]], align 4
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[FOO:%.*]] = getelementptr inbounds [[STRUCT_BAR:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[_X_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[_X_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooIiE3setEi(ptr noundef nonnull align 4 dereferenceable(4) [[FOO]], i32 noundef [[TMP0]])
// CHECK-NEXT: ret void
//
@@ -174,8 +174,8 @@
// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i64, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i64 [[X:%.*]], ptr [[X_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[X_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[X_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3BazIlEC2El(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], i64 noundef [[TMP0]])
// CHECK-NEXT: ret void
//
@@ -183,7 +183,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3BazIlED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR2]]
// CHECK-NEXT: ret void
//
Index: clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/def-and-decl.c.expected
@@ -23,7 +23,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
// CHECK-NEXT: ret i32 [[TMP0]]
//
int foo(int arg) {
Index: clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.plain.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.plain.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.plain.expected
@@ -15,7 +15,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[S:%.*]], ptr [[S_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], ptr [[TMP0]], i64 1
// CHECK-NEXT: [[Z:%.*]] = getelementptr inbounds [[STRUCT_ST]], ptr [[ARRAYIDX]], i32 0, i32 2
// CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_RT:%.*]], ptr [[Z]], i32 0, i32 1
Index: clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.funcattrs.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.funcattrs.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/check-attributes.cpp.funcattrs.expected
@@ -16,7 +16,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[S:%.*]], ptr [[S_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
+// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], ptr [[TMP0]], i64 1
// CHECK-NEXT: [[Z:%.*]] = getelementptr inbounds [[STRUCT_ST]], ptr [[ARRAYIDX]], i32 0, i32 2
// CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_RT:%.*]], ptr [[Z]], i32 0, i32 1
Index: clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
===================================================================
--- clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
+++ clang/test/utils/update_cc_test_checks/Inputs/basic-cplusplus.cpp.expected
@@ -14,10 +14,10 @@
// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2:![0-9]+]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[X]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
// CHECK-NEXT: ret i32 [[ADD]]
//
@@ -33,8 +33,8 @@
// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i32 [[X:%.*]], ptr [[X_ADDR]], align 4
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
// CHECK-NEXT: ret void
//
@@ -43,7 +43,7 @@
// CHECK-NEXT: entry:
// CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: call void @_ZN3FooD2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR3:[0-9]+]]
// CHECK-NEXT: ret void
//
@@ -54,10 +54,10 @@
// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
// CHECK-NEXT: store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
// CHECK-NEXT: store i32 [[ARG:%.*]], ptr [[ARG_ADDR]], align 4
-// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
+// CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[X:%.*]] = getelementptr inbounds [[CLASS_FOO:%.*]], ptr [[THIS1]], i32 0, i32 0
-// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4
-// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4, !freeze_bits [[FREEZE_BITS2]]
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARG_ADDR]], align 4, !freeze_bits [[FREEZE_BITS2]]
// CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP0]], [[TMP1]]
// CHECK-NEXT: ret i32 [[SUB]]
//
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