snehasish added a subscriber: dhoekwater.
snehasish added inline comments.
================
Comment at: llvm/lib/CodeGen/TargetPassConfig.cpp:1278
}
- addPass(createMachineFunctionSplitterPass());
+ if (TM->getTargetTriple().isX86())
+ addPass(createMachineFunctionSplitterPass());
----------------
Can you coordinate with @dhoekwater ? He has some patches in flight for
AArch64.
I think D157157 is the one which modifies the same logic.
================
Comment at: llvm/test/CodeGen/X86/mfs-triple.ll:8
+
+define void @foo4(i1 zeroext %0, i1 zeroext %1) nounwind {
+ br i1 %0, label %3, label %7
----------------
Any reason why we can't use the bitcode already in
test/CodeGen/machine-function-splitter.ll? (Going to be moved to
test/Generic/machine-function-splitter.ll in D157563)
IMO we can just reuse the basic test and add these run and check lines.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D157750/new/
https://reviews.llvm.org/D157750
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