Patryk27 added inline comments.
================
Comment at: llvm/lib/Target/AVR/AVRISelLowering.cpp:2193
+// (the output registers are stored in this array on return).
+static MachineBasicBlock *insertMultibyteShiftLoop(
+ MachineInstr &MI, MachineBasicBlock *BB, Register ShiftNum,
----------------
Note that I've changed to code to re-arrange the generated blocks a bit, from:
```
body: |
bb.0 (%ir-block.0):
successors: %bb.2(0x80000000)
liveins: $r23r22, $r25r24, $r19r18
%2:dregs = COPY $r19r18
%1:dregs = COPY $r25r24
%0:dregs = COPY $r23r22
%4:gpr8 = COPY %2.sub_lo
RJMPk %bb.2
bb.1 (%ir-block.0):
successors: %bb.2(0x80000000)
%12:gpr8 = ADDRdRr %10, %10, implicit-def $sreg
%13:gpr8 = ADCRdRr %9, %9, implicit-def $sreg, implicit $sreg
%14:gpr8 = ADCRdRr %8, %8, implicit-def $sreg, implicit $sreg
%15:gpr8 = ADCRdRr %7, %7, implicit-def $sreg, implicit $sreg
bb.2 (%ir-block.0):
successors: %bb.1(0x40000000), %bb.3(0x40000000)
%7:gpr8 = PHI %1.sub_hi, %bb.0, %15, %bb.1
%8:gpr8 = PHI %1.sub_lo, %bb.0, %14, %bb.1
%9:gpr8 = PHI %0.sub_hi, %bb.0, %13, %bb.1
%10:gpr8 = PHI %0.sub_lo, %bb.0, %12, %bb.1
%16:gpr8 = PHI %4, %bb.0, %17, %bb.1
%17:gpr8 = DECRd %16, implicit-def $sreg
BRPLk %bb.1, implicit $sreg
bb.3 (%ir-block.0):
%6:dregs = REG_SEQUENCE %7, %subreg.sub_hi, %8, %subreg.sub_lo
%5:dregs = REG_SEQUENCE %9, %subreg.sub_hi, %10, %subreg.sub_lo
$r23r22 = COPY %5
$r25r24 = COPY %6
RET implicit $r23r22, implicit $r25r24, implicit $r1
```
... to:
```
body: |
bb.0 (%ir-block.0):
successors: %bb.1(0x80000000)
liveins: $r23r22, $r25r24, $r19r18
%2:dregs = COPY $r19r18
%1:dregs = COPY $r25r24
%0:dregs = COPY $r23r22
%4:gpr8 = COPY %2.sub_lo
# fall-through instead of jumping
bb.1 (%ir-block.0):
successors: %bb.2(0x40000000), %bb.3(0x40000000)
%7:gpr8 = PHI %1.sub_hi, %bb.0, %15, %bb.2
%8:gpr8 = PHI %1.sub_lo, %bb.0, %14, %bb.2
%9:gpr8 = PHI %0.sub_hi, %bb.0, %13, %bb.2
%10:gpr8 = PHI %0.sub_lo, %bb.0, %12, %bb.2
%16:gpr8 = PHI %4, %bb.0, %17, %bb.2
%17:gpr8 = DECRd %16, implicit-def $sreg
BRMIk %bb.3, implicit $sreg # <- reversed comparison + fallthrough
bb.2 (%ir-block.0):
successors: %bb.1(0x80000000)
%12:gpr8 = ADDRdRr %10, %10, implicit-def $sreg
%13:gpr8 = ADCRdRr %9, %9, implicit-def $sreg, implicit $sreg
%14:gpr8 = ADCRdRr %8, %8, implicit-def $sreg, implicit $sreg
%15:gpr8 = ADCRdRr %7, %7, implicit-def $sreg, implicit $sreg
RJMPk %bb.1 # <- jump to the beginning
bb.3 (%ir-block.0):
%6:dregs = REG_SEQUENCE %7, %subreg.sub_hi, %8, %subreg.sub_lo
%5:dregs = REG_SEQUENCE %9, %subreg.sub_hi, %10, %subreg.sub_lo
$r23r22 = COPY %5
$r25r24 = COPY %6
RET implicit $r23r22, implicit $r25r24, implicit $r1
```
It looks like the generated assembly remained the same, I've also checked the
actual binary through rustc + simavr.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153197/new/
https://reviews.llvm.org/D153197
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