nikic added inline comments.
================
Comment at:
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp:927-933
+ if (I->getOperand(0) != I->getOperand(1)) {
+ APInt DemandedMaskLHS(DemandedMask.lshr(ShiftAmt));
+ APInt DemandedMaskRHS(DemandedMask.shl(BitWidth - ShiftAmt));
+ if (SimplifyDemandedBits(I, 0, DemandedMaskLHS, LHSKnown, Depth + 1)
||
+ SimplifyDemandedBits(I, 1, DemandedMaskRHS, RHSKnown, Depth + 1))
+ return I;
+ }
----------------
You should be able to do something along these lines.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150670/new/
https://reviews.llvm.org/D150670
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