paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.
The commit message is incorrect because the SVE Clang builtins are not named
`mla_u` and so should read `SVE integer mla_x/mls_x builtins` Other than that
the patch looks good to me.
================
Comment at: llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll:1203
+define <vscale x 16 x i8> @mla_i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8>
%a, <vscale x 16 x i8> %b, <vscale x 16 x i8> %c) {
+; CHECK-LABEL: mla_i8:
----------------
Just because this is a big file can you follow the existing scheme of sorting
alphabetically (i.e. move the new block just before the @mul functions and
prefix the two blocks with
```
;
; MLA
;
```
```
;
; MLS
;
```
accordingly. This just makes it easier to find things when manually scrolling.
================
Comment at:
llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll:1360-1368
+declare <vscale x 16 x i8> @llvm.aarch64.sve.mla.u.nxv16i8(<vscale x 16 x
i1>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>)
+declare <vscale x 8 x i16> @llvm.aarch64.sve.mla.u.nxv8i16(<vscale x 8 x
i1>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>)
+declare <vscale x 4 x i32> @llvm.aarch64.sve.mla.u.nxv4i32(<vscale x 4 x
i1>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>)
+declare <vscale x 2 x i64> @llvm.aarch64.sve.mla.u.nxv2i64(<vscale x 2 x
i1>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>)
+
+declare <vscale x 16 x i8> @llvm.aarch64.sve.mls.u.nxv16i8(<vscale x 16 x
i1>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>)
+declare <vscale x 8 x i16> @llvm.aarch64.sve.mls.u.nxv8i16(<vscale x 8 x
i1>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>)
----------------
As above, please maintain the ordering by moving these declaration just before
those for `mul`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150553/new/
https://reviews.llvm.org/D150553
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