craig.topper added inline comments.
================
Comment at: clang/include/clang/Basic/riscv_sifive_vector.td:41
+ if !find(prototype, "0") then {
+ def : VCIXBuiltinSet<name, IR_name, suffix, prototype, type_range,
intrinsic_types>;
+ }
----------------
Indent
================
Comment at: clang/include/clang/Basic/riscv_sifive_vector.td:64
+ // lots of redundant intrinsic but have same names.
+ let Log2LMUL = [0] in
+ def : VCIXBuiltinSet<name, IR_name, suffix, prototype, r,
intrinsic_types>;
----------------
This should be indented further
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148223/new/
https://reviews.llvm.org/D148223
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
