Author: Paul Robinson Date: 2023-04-04T06:26:05-07:00 New Revision: a82170fa41ca9756b0f67d0ed015adef325e8921
URL: https://github.com/llvm/llvm-project/commit/a82170fa41ca9756b0f67d0ed015adef325e8921 DIFF: https://github.com/llvm/llvm-project/commit/a82170fa41ca9756b0f67d0ed015adef325e8921.diff LOG: [Headers] Add some intrinsic function descriptions to immintrin.h. Differential Revision: https://reviews.llvm.org/D147461 Added: Modified: clang/lib/Headers/immintrin.h Removed: ################################################################################ diff --git a/clang/lib/Headers/immintrin.h b/clang/lib/Headers/immintrin.h index 8e109af0f5817..d382ec88f30f7 100644 --- a/clang/lib/Headers/immintrin.h +++ b/clang/lib/Headers/immintrin.h @@ -284,18 +284,45 @@ _rdpid_u32(void) { #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ defined(__RDRND__) +/// Returns a 16-bit hardware-generated random value. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDRAND </c> instruction. +/// +/// \param __p +/// A pointer to a 16-bit memory location to place the random value. +/// \returns 1 if the value was successfully generated, 0 otherwise. static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) _rdrand16_step(unsigned short *__p) { return (int)__builtin_ia32_rdrand16_step(__p); } +/// Returns a 32-bit hardware-generated random value. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDRAND </c> instruction. +/// +/// \param __p +/// A pointer to a 32-bit memory location to place the random value. +/// \returns 1 if the value was successfully generated, 0 otherwise. static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) _rdrand32_step(unsigned int *__p) { return (int)__builtin_ia32_rdrand32_step(__p); } +/// Returns a 64-bit hardware-generated random value. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDRAND </c> instruction. +/// +/// \param __p +/// A pointer to a 64-bit memory location to place the random value. +/// \returns 1 if the value was successfully generated, 0 otherwise. #ifdef __x86_64__ static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) _rdrand64_step(unsigned long long *__p) @@ -325,48 +352,108 @@ _rdrand64_step(unsigned long long *__p) #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ defined(__FSGSBASE__) #ifdef __x86_64__ +/// Reads the FS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDFSBASE </c> instruction. +/// +/// \returns The lower 32 bits of the FS base register. static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readfsbase_u32(void) { return __builtin_ia32_rdfsbase32(); } +/// Reads the FS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDFSBASE </c> instruction. +/// +/// \returns The contents of the FS base register. static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readfsbase_u64(void) { return __builtin_ia32_rdfsbase64(); } +/// Reads the GS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDGSBASE </c> instruction. +/// +/// \returns The lower 32 bits of the GS base register. static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readgsbase_u32(void) { return __builtin_ia32_rdgsbase32(); } +/// Reads the GS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> RDGSBASE </c> instruction. +/// +/// \returns The contents of the GS base register. static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _readgsbase_u64(void) { return __builtin_ia32_rdgsbase64(); } +/// Modifies the FS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> WRFSBASE </c> instruction. +/// +/// \param __V +/// Value to use for the lower 32 bits of the FS base register. static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writefsbase_u32(unsigned int __V) { __builtin_ia32_wrfsbase32(__V); } +/// Modifies the FS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> WRFSBASE </c> instruction. +/// +/// \param __V +/// Value to use for the FS base register. static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writefsbase_u64(unsigned long long __V) { __builtin_ia32_wrfsbase64(__V); } +/// Modifies the GS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> WRGSBASE </c> instruction. +/// +/// \param __V +/// Value to use for the lower 32 bits of the GS base register. static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writegsbase_u32(unsigned int __V) { __builtin_ia32_wrgsbase32(__V); } +/// Modifies the GS base register. +/// +/// \headerfile <immintrin.h> +/// +/// This intrinsic corresponds to the <c> WRFSBASE </c> instruction. +/// +/// \param __V +/// Value to use for GS base register. static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) _writegsbase_u64(unsigned long long __V) { _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
