This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGfeb585e7d62c: [clang-format] Handle Verilog struct literals (authored by sstwcw).
Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147329/new/ https://reviews.llvm.org/D147329 Files: clang/lib/Format/Format.cpp clang/lib/Format/FormatToken.h clang/unittests/Format/FormatTestVerilog.cpp Index: clang/unittests/Format/FormatTestVerilog.cpp =================================================================== --- clang/unittests/Format/FormatTestVerilog.cpp +++ clang/unittests/Format/FormatTestVerilog.cpp @@ -916,6 +916,25 @@ verifyFormat("{<<byte{j}} = x;"); } +TEST_F(FormatTestVerilog, StructLiteral) { + verifyFormat("c = '{0, 0.0};"); + verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};"); + verifyFormat("c = '{a: 0, b: 0.0};"); + verifyFormat("c = '{a: 0, b: 0.0, default: 0};"); + verifyFormat("c = ab'{a: 0, b: 0.0};"); + verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};"); + verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};"); + verifyFormat("d = {int: 1, shortreal: 1.0};"); + verifyFormat("d = ab'{int: 1, shortreal: 1.0};"); + verifyFormat("c = '{default: 0};"); + auto Style = getDefaultStyle(); + Style.SpacesInContainerLiterals = true; + verifyFormat("c = '{a : 0, b : 0.0};", Style); + verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style); + verifyFormat("c = ab'{a : 0, b : 0.0};", Style); + verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style); +} + TEST_F(FormatTestVerilog, StructuredProcedure) { // Blocks should be indented correctly. verifyFormat("initial begin\n" Index: clang/lib/Format/FormatToken.h =================================================================== --- clang/lib/Format/FormatToken.h +++ clang/lib/Format/FormatToken.h @@ -1722,8 +1722,9 @@ case tok::kw_while: return false; case tok::identifier: - return VerilogExtraKeywords.find(Tok.Tok.getIdentifierInfo()) == - VerilogExtraKeywords.end(); + return isWordLike(Tok) && + VerilogExtraKeywords.find(Tok.Tok.getIdentifierInfo()) == + VerilogExtraKeywords.end(); default: // getIdentifierInfo returns non-null for both identifiers and keywords. return Tok.Tok.getIdentifierInfo(); Index: clang/lib/Format/Format.cpp =================================================================== --- clang/lib/Format/Format.cpp +++ clang/lib/Format/Format.cpp @@ -1489,6 +1489,7 @@ break; case FormatStyle::LK_Verilog: LLVMStyle.IndentCaseLabels = true; + LLVMStyle.SpacesInContainerLiterals = false; break; default: break;
Index: clang/unittests/Format/FormatTestVerilog.cpp =================================================================== --- clang/unittests/Format/FormatTestVerilog.cpp +++ clang/unittests/Format/FormatTestVerilog.cpp @@ -916,6 +916,25 @@ verifyFormat("{<<byte{j}} = x;"); } +TEST_F(FormatTestVerilog, StructLiteral) { + verifyFormat("c = '{0, 0.0};"); + verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};"); + verifyFormat("c = '{a: 0, b: 0.0};"); + verifyFormat("c = '{a: 0, b: 0.0, default: 0};"); + verifyFormat("c = ab'{a: 0, b: 0.0};"); + verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};"); + verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};"); + verifyFormat("d = {int: 1, shortreal: 1.0};"); + verifyFormat("d = ab'{int: 1, shortreal: 1.0};"); + verifyFormat("c = '{default: 0};"); + auto Style = getDefaultStyle(); + Style.SpacesInContainerLiterals = true; + verifyFormat("c = '{a : 0, b : 0.0};", Style); + verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style); + verifyFormat("c = ab'{a : 0, b : 0.0};", Style); + verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style); +} + TEST_F(FormatTestVerilog, StructuredProcedure) { // Blocks should be indented correctly. verifyFormat("initial begin\n" Index: clang/lib/Format/FormatToken.h =================================================================== --- clang/lib/Format/FormatToken.h +++ clang/lib/Format/FormatToken.h @@ -1722,8 +1722,9 @@ case tok::kw_while: return false; case tok::identifier: - return VerilogExtraKeywords.find(Tok.Tok.getIdentifierInfo()) == - VerilogExtraKeywords.end(); + return isWordLike(Tok) && + VerilogExtraKeywords.find(Tok.Tok.getIdentifierInfo()) == + VerilogExtraKeywords.end(); default: // getIdentifierInfo returns non-null for both identifiers and keywords. return Tok.Tok.getIdentifierInfo(); Index: clang/lib/Format/Format.cpp =================================================================== --- clang/lib/Format/Format.cpp +++ clang/lib/Format/Format.cpp @@ -1489,6 +1489,7 @@ break; case FormatStyle::LK_Verilog: LLVMStyle.IndentCaseLabels = true; + LLVMStyle.SpacesInContainerLiterals = false; break; default: break;
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