This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGb688b58f83ce: [clang-format] Fix non-case colons in Verilog case lines (authored by sstwcw).
Changed prior to commit: https://reviews.llvm.org/D145888?vs=504481&id=506431#toc Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D145888/new/ https://reviews.llvm.org/D145888 Files: clang/lib/Format/TokenAnnotator.cpp clang/unittests/Format/FormatTestVerilog.cpp Index: clang/unittests/Format/FormatTestVerilog.cpp =================================================================== --- clang/unittests/Format/FormatTestVerilog.cpp +++ clang/unittests/Format/FormatTestVerilog.cpp @@ -250,6 +250,39 @@ " end\n" "endcase", Style); + // Other colons should not be mistaken as case colons. + Style = getLLVMStyle(FormatStyle::LK_Verilog); + Style.BitFieldColonSpacing = FormatStyle::BFCS_None; + verifyFormat("case (x[1:0])\n" + "endcase", + Style); + verifyFormat("default:\n" + " x[1:0] = x[1:0];", + Style); + Style.BitFieldColonSpacing = FormatStyle::BFCS_Both; + verifyFormat("case (x[1 : 0])\n" + "endcase", + Style); + verifyFormat("default:\n" + " x[1 : 0] = x[1 : 0];", + Style); + Style = getLLVMStyle(FormatStyle::LK_Verilog); + Style.SpacesInContainerLiterals = true; + verifyFormat("case ('{x : x, default : 9})\n" + "endcase", + Style); + verifyFormat("x = '{x : x, default : 9};\n", Style); + verifyFormat("default:\n" + " x = '{x : x, default : 9};\n", + Style); + Style.SpacesInContainerLiterals = false; + verifyFormat("case ('{x: x, default: 9})\n" + "endcase", + Style); + verifyFormat("x = '{x: x, default: 9};\n", Style); + verifyFormat("default:\n" + " x = '{x: x, default: 9};\n", + Style); } TEST_F(FormatTestVerilog, Coverage) { Index: clang/lib/Format/TokenAnnotator.cpp =================================================================== --- clang/lib/Format/TokenAnnotator.cpp +++ clang/lib/Format/TokenAnnotator.cpp @@ -4426,8 +4426,6 @@ Line.First->isOneOf(tok::kw_default, tok::kw_case))) { return Style.SpaceBeforeCaseColon; } - if (Line.First->isOneOf(tok::kw_default, tok::kw_case)) - return Style.SpaceBeforeCaseColon; const FormatToken *Next = Right.getNextNonComment(); if (!Next || Next->is(tok::semi)) return false;
Index: clang/unittests/Format/FormatTestVerilog.cpp =================================================================== --- clang/unittests/Format/FormatTestVerilog.cpp +++ clang/unittests/Format/FormatTestVerilog.cpp @@ -250,6 +250,39 @@ " end\n" "endcase", Style); + // Other colons should not be mistaken as case colons. + Style = getLLVMStyle(FormatStyle::LK_Verilog); + Style.BitFieldColonSpacing = FormatStyle::BFCS_None; + verifyFormat("case (x[1:0])\n" + "endcase", + Style); + verifyFormat("default:\n" + " x[1:0] = x[1:0];", + Style); + Style.BitFieldColonSpacing = FormatStyle::BFCS_Both; + verifyFormat("case (x[1 : 0])\n" + "endcase", + Style); + verifyFormat("default:\n" + " x[1 : 0] = x[1 : 0];", + Style); + Style = getLLVMStyle(FormatStyle::LK_Verilog); + Style.SpacesInContainerLiterals = true; + verifyFormat("case ('{x : x, default : 9})\n" + "endcase", + Style); + verifyFormat("x = '{x : x, default : 9};\n", Style); + verifyFormat("default:\n" + " x = '{x : x, default : 9};\n", + Style); + Style.SpacesInContainerLiterals = false; + verifyFormat("case ('{x: x, default: 9})\n" + "endcase", + Style); + verifyFormat("x = '{x: x, default: 9};\n", Style); + verifyFormat("default:\n" + " x = '{x: x, default: 9};\n", + Style); } TEST_F(FormatTestVerilog, Coverage) { Index: clang/lib/Format/TokenAnnotator.cpp =================================================================== --- clang/lib/Format/TokenAnnotator.cpp +++ clang/lib/Format/TokenAnnotator.cpp @@ -4426,8 +4426,6 @@ Line.First->isOneOf(tok::kw_default, tok::kw_case))) { return Style.SpaceBeforeCaseColon; } - if (Line.First->isOneOf(tok::kw_default, tok::kw_case)) - return Style.SpaceBeforeCaseColon; const FormatToken *Next = Right.getNextNonComment(); if (!Next || Next->is(tok::semi)) return false;
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