This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG5fba4c4d08bd: [AArch64] Don't #define __ARM_FP when
there's no FPU. (authored by simon_tatham).
Changed prior to commit:
https://reviews.llvm.org/D145781?vs=504084&id=504718#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145781/new/
https://reviews.llvm.org/D145781
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/test/Preprocessor/aarch64-target-features.c
Index: clang/test/Preprocessor/aarch64-target-features.c
===================================================================
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -341,6 +341,10 @@
// CHECK-MARCH-2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"-fp-armv8" "-target-feature" "-neon" "-target-feature" "-crc"
"-target-feature" "-crypto"
// CHECK-MARCH-3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"-neon"
+// While we're checking +nofp, also make sure it stops defining __ARM_FP
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-r+nofp -x c -E -dM
%s -o - | FileCheck -check-prefix=CHECK-NOFP %s
+// CHECK-NOFP-NOT: #define __ARM_FP{{ }}
+
// Check +sm4:
//
// RUN: %clang -target aarch64 -march=armv8.2a+sm4 -### -c %s 2>&1 | FileCheck
-check-prefix=CHECK-SM4 %s
Index: clang/lib/Basic/Targets/AArch64.h
===================================================================
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -26,7 +26,11 @@
static const TargetInfo::GCCRegAlias GCCRegAliases[];
static const char *const GCCRegNames[];
- enum FPUModeEnum { FPUMode, NeonMode = (1 << 0), SveMode = (1 << 1) };
+ enum FPUModeEnum {
+ FPUMode = (1 << 0),
+ NeonMode = (1 << 1),
+ SveMode = (1 << 2),
+ };
unsigned FPU = FPUMode;
bool HasCRC = false;
@@ -73,6 +77,7 @@
bool HasWFxT = false;
bool HasJSCVT = false;
bool HasFCMA = false;
+ bool HasNoFP = false;
bool HasNoNeon = false;
bool HasNoSVE = false;
bool HasFMV = true;
Index: clang/lib/Basic/Targets/AArch64.cpp
===================================================================
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -373,7 +373,8 @@
Builder.defineMacro("__ARM_ALIGN_MAX_STACK_PWR", "4");
// 0xe implies support for half, single and double precision operations.
- Builder.defineMacro("__ARM_FP", "0xE");
+ if (FPU & FPUMode)
+ Builder.defineMacro("__ARM_FP", "0xE");
// PCS specifies this for SysV variants, which is all we support. Other ABIs
// may choose __ARM_FP16_FORMAT_ALTERNATIVE.
@@ -709,6 +710,8 @@
bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string>
&Features,
DiagnosticsEngine &Diags) {
for (const auto &Feature : Features) {
+ if (Feature == "-fp-armv8")
+ HasNoFP = true;
if (Feature == "-neon")
HasNoNeon = true;
if (Feature == "-sve")
@@ -937,6 +940,11 @@
setDataLayout();
setArchFeatures();
+ if (HasNoFP) {
+ FPU &= ~FPUMode;
+ FPU &= ~NeonMode;
+ FPU &= ~SveMode;
+ }
if (HasNoNeon) {
FPU &= ~NeonMode;
FPU &= ~SveMode;
Index: clang/test/Preprocessor/aarch64-target-features.c
===================================================================
--- clang/test/Preprocessor/aarch64-target-features.c
+++ clang/test/Preprocessor/aarch64-target-features.c
@@ -341,6 +341,10 @@
// CHECK-MARCH-2: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "-fp-armv8" "-target-feature" "-neon" "-target-feature" "-crc" "-target-feature" "-crypto"
// CHECK-MARCH-3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "-neon"
+// While we're checking +nofp, also make sure it stops defining __ARM_FP
+// RUN: %clang -target aarch64-none-linux-gnu -march=armv8-r+nofp -x c -E -dM %s -o - | FileCheck -check-prefix=CHECK-NOFP %s
+// CHECK-NOFP-NOT: #define __ARM_FP{{ }}
+
// Check +sm4:
//
// RUN: %clang -target aarch64 -march=armv8.2a+sm4 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-SM4 %s
Index: clang/lib/Basic/Targets/AArch64.h
===================================================================
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -26,7 +26,11 @@
static const TargetInfo::GCCRegAlias GCCRegAliases[];
static const char *const GCCRegNames[];
- enum FPUModeEnum { FPUMode, NeonMode = (1 << 0), SveMode = (1 << 1) };
+ enum FPUModeEnum {
+ FPUMode = (1 << 0),
+ NeonMode = (1 << 1),
+ SveMode = (1 << 2),
+ };
unsigned FPU = FPUMode;
bool HasCRC = false;
@@ -73,6 +77,7 @@
bool HasWFxT = false;
bool HasJSCVT = false;
bool HasFCMA = false;
+ bool HasNoFP = false;
bool HasNoNeon = false;
bool HasNoSVE = false;
bool HasFMV = true;
Index: clang/lib/Basic/Targets/AArch64.cpp
===================================================================
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -373,7 +373,8 @@
Builder.defineMacro("__ARM_ALIGN_MAX_STACK_PWR", "4");
// 0xe implies support for half, single and double precision operations.
- Builder.defineMacro("__ARM_FP", "0xE");
+ if (FPU & FPUMode)
+ Builder.defineMacro("__ARM_FP", "0xE");
// PCS specifies this for SysV variants, which is all we support. Other ABIs
// may choose __ARM_FP16_FORMAT_ALTERNATIVE.
@@ -709,6 +710,8 @@
bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
DiagnosticsEngine &Diags) {
for (const auto &Feature : Features) {
+ if (Feature == "-fp-armv8")
+ HasNoFP = true;
if (Feature == "-neon")
HasNoNeon = true;
if (Feature == "-sve")
@@ -937,6 +940,11 @@
setDataLayout();
setArchFeatures();
+ if (HasNoFP) {
+ FPU &= ~FPUMode;
+ FPU &= ~NeonMode;
+ FPU &= ~SveMode;
+ }
if (HasNoNeon) {
FPU &= ~NeonMode;
FPU &= ~SveMode;
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