kmclaughlin added inline comments.
================ Comment at: llvm/test/CodeGen/AArch64/sve2-intrinsics-fp-int-binary-logarithm.ll:31 +; CHECK-NEXT: ret + %out = call <vscale x 2 x i64> @llvm.aarch64.sve.flogb.nxv2f64(<vscale x 2 x i64> %a, + <vscale x 2 x i1> %pg, ---------------- Allen wrote: > hi, kmclaughlin: > Sorry for the naive question： > flogb is an unary instruction showed in assemble . Why shall we need %a as > an **input** operand in the instrinsic? can it be similar with > ``` > %a = call <vscale x 2 x i64> @llvm.aarch64.sve.flogb.nxv2f64(<vscale x 2 x > i1> %pg,<vscale x 2 x double> %b) > ``` Hi @Allen, The first input to this intrinsic is the passthru, which contains the values used for inactive lanes of the predicate `%pg`. The inactive lanes can be set to zero, merged with separate vector or set to unknown. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70253/new/ https://reviews.llvm.org/D70253 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
