RKSimon added a comment.
@GGanesh reverse-ping
================
Comment at: llvm/lib/Target/X86/X86.td:1619
ProcessorFeatures.ZN3Tuning>;
+def : ProcModel<"znver4", Znver3Model, ProcessorFeatures.ZN4Features,
+ ProcessorFeatures.ZN4Tuning>;
----------------
RKSimon wrote:
> This might sound strange - but its probably better to use either the IceLake
> or SkylakeServer model initially - as they have AVX512 instruction coverage,
> the znver3 model will assert in llvm-mca etc when it encounters an
> unsupported instruction (any of the Z sched classes).
If the use of an Intel model isn't acceptable, using the Proc<> macro (no
model) would be the most straightforward - but if you wish to use the znver3
model as a stopgap then I don't want to stop you, just bear in mind that it
will cause breaks, particularly where the models are used for codegen analysis
etc.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139073/new/
https://reviews.llvm.org/D139073
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