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Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D137287 Files: clang/test/CodeGenCoroutines/pr56329.cpp llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir llvm/test/MC/WebAssembly/tag-section-decoding.ll llvm/test/MC/WebAssembly/type-checker-emit-after-unreachable.s llvm/test/Transforms/Coroutines/coro-debug.ll mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir mlir/test/Dialect/MemRef/canonicalize.mlir mlir/test/Dialect/Tensor/canonicalize.mlir mlir/test/python/ir/affine_expr.py
Index: mlir/test/python/ir/affine_expr.py =================================================================== --- mlir/test/python/ir/affine_expr.py +++ mlir/test/python/ir/affine_expr.py @@ -116,7 +116,7 @@ # CHECK: 2 print(s2.position) - # CHEKC: s2 + # CHECK: s2 print(s2) assert s1 == s11 Index: mlir/test/Dialect/Tensor/canonicalize.mlir =================================================================== --- mlir/test/Dialect/Tensor/canonicalize.mlir +++ mlir/test/Dialect/Tensor/canonicalize.mlir @@ -353,7 +353,7 @@ // CHECK-SAME: [4, 1, %{{[a-zA-Z0-9_]+}}] [1, 1, 1] // CHECK-SAME: : tensor<?x?x?xf32> to tensor<4x1x?xf32> // CHECK: %[[RESULT:.+]] = tensor.cast %[[SLICE]] -// CHEKC: return %[[RESULT]] +// CHECK: return %[[RESULT]] // ----- @@ -372,7 +372,7 @@ // CHECK-SAME: [4, 1, %{{[a-zA-Z0-9_]+}}] [1, 1, 1] // CHECK-SAME: : tensor<?x?x?xf32> to tensor<4x?xf32> // CHECK: %[[RESULT:.+]] = tensor.cast %[[SLICE]] -// CHEKC: return %[[RESULT]] +// CHECK: return %[[RESULT]] // ----- @@ -467,7 +467,7 @@ // CHECK: %[[RESULT:.+]] = tensor.insert_slice %[[SLICE]] // CHECK-SAME: [0, %{{.+}}, 1] [4, 1, %{{.+}}] [1, 1, 1] // CHECK-SAME: : tensor<4x1x?xf32> into tensor<?x?x?xf32> -// CHEKC: return %[[RESULT]] +// CHECK: return %[[RESULT]] // ----- @@ -486,7 +486,7 @@ // CHECK: %[[RESULT:.+]] = tensor.insert_slice %[[CAST]] // CHECK-SAME: [0, %{{.+}}, 1] [4, 1, %{{.+}}] [1, 1, 1] // CHECK-SAME: : tensor<4x?xf32> into tensor<?x?x?xf32> -// CHEKC: return %[[RESULT]] +// CHECK: return %[[RESULT]] // ----- @@ -509,7 +509,7 @@ // CHECK: %[[RESULT:.+]] = tensor.insert_slice %[[SLICE]] into %[[ARG3]] // CHECK-SAME: [0, %{{.+}}, 1] [4, 1, %{{.+}}] [1, 1, 1] // CHECK-SAME: : tensor<4x?xf32> into tensor<?x?x?xf32> -// CHEKC: return %[[RESULT]] +// CHECK: return %[[RESULT]] // ----- Index: mlir/test/Dialect/MemRef/canonicalize.mlir =================================================================== --- mlir/test/Dialect/MemRef/canonicalize.mlir +++ mlir/test/Dialect/MemRef/canonicalize.mlir @@ -57,7 +57,7 @@ // CHECK-SAME: [4, 1, %{{[a-zA-Z0-9_]+}}] [1, 1, 1] // CHECK-SAME: : memref<?x?x?xf32> to memref<4x1x?xf32 // CHECK: %[[RESULT:.+]] = memref.cast %[[SUBVIEW]] -// CHEKC: return %[[RESULT]] +// CHECK: return %[[RESULT]] // ----- Index: mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir =================================================================== --- mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir +++ mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir @@ -148,7 +148,7 @@ // CHECK-LABEL: @powf_vector func.func @powf_vector(%lhs: vector<4xf32>, %rhs: vector<4xf32>) -> vector<4xf32> { // CHECK: spirv.FOrdLessThan - // CHEKC: spirv.GL.FAbs + // CHECK: spirv.GL.FAbs // CHECK: spirv.GL.Pow %{{.*}}: vector<4xf32> // CHECK: spirv.FNegate // CHECK: spirv.Select Index: llvm/test/Transforms/Coroutines/coro-debug.ll =================================================================== --- llvm/test/Transforms/Coroutines/coro-debug.ll +++ llvm/test/Transforms/Coroutines/coro-debug.ll @@ -189,7 +189,7 @@ ; CHECK: %[[ALLOCATED_STORAGE:.+]] = invoke i8* @allocate() ; CHECK-NEXT: to label %[[NORMAL_DEST:.+]] unwind ; CHECK: [[NORMAL_DEST]] -; CHEKC-NEXT: call void @llvm.dbg.declare(metadata i8* %[[ALLOCATED_STORAGE]] +; CHECK-NEXT: call void @llvm.dbg.declare(metadata i8* %[[ALLOCATED_STORAGE]] ; CHECK: %[[CALLBR_RES:.+]] = callbr i32 asm ; CHECK-NEXT: to label %[[DEFAULT_DEST:.+]] [label ; CHECK: [[DEFAULT_DEST]]: Index: llvm/test/MC/WebAssembly/type-checker-emit-after-unreachable.s =================================================================== --- llvm/test/MC/WebAssembly/type-checker-emit-after-unreachable.s +++ llvm/test/MC/WebAssembly/type-checker-emit-after-unreachable.s @@ -16,12 +16,12 @@ end_function # CHECK-LABEL: foo: -# CHEKC-NEXT: .functype foo () -> (i32) -# CHEKC-NEXT: i32.const 1 -# CHEKC-NEXT: if i32 -# CHEKC-NEXT: i32.const 2 -# CHEKC-NEXT: return -# CHEKC-NEXT: else -# CHEKC-NEXT: i32.const 3 -# CHEKC-NEXT: end_if -# CHEKC-NEXT: end_function +# CHECK-NEXT: .functype foo () -> (i32) +# CHECK-NEXT: i32.const 1 +# CHECK-NEXT: if i32 +# CHECK-NEXT: i32.const 2 +# CHECK-NEXT: return +# CHECK-NEXT: else +# CHECK-NEXT: i32.const 3 +# CHECK-NEXT: end_if +# CHECK-NEXT: end_function Index: llvm/test/MC/WebAssembly/tag-section-decoding.ll =================================================================== --- llvm/test/MC/WebAssembly/tag-section-decoding.ll +++ llvm/test/MC/WebAssembly/tag-section-decoding.ll @@ -339,4 +339,4 @@ ; number with which its LEB128 and ULEB128 encodings are different, because its ; 7th least significant bit is not 0. ; CHECK: - Type: TAG -; CHEC-NEXT: TagTypes: [ 64 ] +; CHECK-NEXT: TagTypes: [ 64 ] Index: llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir =================================================================== --- llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir +++ llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir @@ -19,7 +19,7 @@ # CHECK: DBG_VALUE $rcx # CHECK-NEXT: $rdx = MOV64rr killed $rcx # CHECK-LABEL: bb.5: -# CHEKC-NOT: DBG_VALUE +# CHECK-NOT: DBG_VALUE --- | target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" Index: clang/test/CodeGenCoroutines/pr56329.cpp =================================================================== --- clang/test/CodeGenCoroutines/pr56329.cpp +++ clang/test/CodeGenCoroutines/pr56329.cpp @@ -116,4 +116,4 @@ // CHECK: musttail call // CHECK: musttail call // CHECK-NEXT: ret void -// CHEKC-NEXT: } +// CHECK-NEXT: }
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