lenary created this revision. lenary added reviewers: john.brawn, dmgreen. Herald added subscribers: hiraditya, kristof.beyls. Herald added a project: All. lenary requested review of this revision. Herald added projects: clang, LLVM. Herald added a subscriber: cfe-commits.
This brings clang/llvm into line with GCC. The Pass is still enabled for the affected cores, but is now opt-in when using `-march=`. I also took the opportunity to add release notes for this change. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D125775 Files: clang/docs/ReleaseNotes.rst llvm/docs/ReleaseNotes.rst llvm/lib/Target/ARM/ARM.td Index: llvm/lib/Target/ARM/ARM.td =================================================================== --- llvm/lib/Target/ARM/ARM.td +++ llvm/lib/Target/ARM/ARM.td @@ -1161,7 +1161,7 @@ // ARM processors // // Dummy CPU, used to target architectures -def : ProcessorModel<"generic", CortexA8Model, [FeatureFixCortexA57AES1742098]>; +def : ProcessorModel<"generic", CortexA8Model, []>; // FIXME: Several processors below are not using their own scheduler // model, but one of similar/previous processor. These should be fixed. Index: llvm/docs/ReleaseNotes.rst =================================================================== --- llvm/docs/ReleaseNotes.rst +++ llvm/docs/ReleaseNotes.rst @@ -99,6 +99,8 @@ warnings will be generated and -mrestrict-it is now always off by default. Previously it was on by default for Armv8 and off for all other architecture versions. +* Added a pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72 + Erratum 1655431. This is enabled by default when targeting either CPU. Changes to the AVR Backend -------------------------- Index: clang/docs/ReleaseNotes.rst =================================================================== --- clang/docs/ReleaseNotes.rst +++ clang/docs/ReleaseNotes.rst @@ -265,6 +265,11 @@ the parameter list were ``void``. There is no ``-fknr-functions`` or ``-fno-no-knr-functions`` flag; this feature cannot be disabled in language modes where it is required, such as C++ or C2x. +- A new ARM pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72 Erratum + 1655431 can be enabled using ``-mfix-cortex-a57-aes-1742098`` or + ``-mfix-cortex-a72-aes-1655431``. The pass is enabled when using either of + these cpus with ``-mcpu=`` and can be disabled using + ``-mno-fix-cortex-a57-aes-1742098`` or ``-mno-fix-cortex-a72-aes-1655431``. Deprecated Compiler Flags -------------------------
Index: llvm/lib/Target/ARM/ARM.td =================================================================== --- llvm/lib/Target/ARM/ARM.td +++ llvm/lib/Target/ARM/ARM.td @@ -1161,7 +1161,7 @@ // ARM processors // // Dummy CPU, used to target architectures -def : ProcessorModel<"generic", CortexA8Model, [FeatureFixCortexA57AES1742098]>; +def : ProcessorModel<"generic", CortexA8Model, []>; // FIXME: Several processors below are not using their own scheduler // model, but one of similar/previous processor. These should be fixed. Index: llvm/docs/ReleaseNotes.rst =================================================================== --- llvm/docs/ReleaseNotes.rst +++ llvm/docs/ReleaseNotes.rst @@ -99,6 +99,8 @@ warnings will be generated and -mrestrict-it is now always off by default. Previously it was on by default for Armv8 and off for all other architecture versions. +* Added a pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72 + Erratum 1655431. This is enabled by default when targeting either CPU. Changes to the AVR Backend -------------------------- Index: clang/docs/ReleaseNotes.rst =================================================================== --- clang/docs/ReleaseNotes.rst +++ clang/docs/ReleaseNotes.rst @@ -265,6 +265,11 @@ the parameter list were ``void``. There is no ``-fknr-functions`` or ``-fno-no-knr-functions`` flag; this feature cannot be disabled in language modes where it is required, such as C++ or C2x. +- A new ARM pass to workaround Cortex-A57 Erratum 1742098 and Cortex-A72 Erratum + 1655431 can be enabled using ``-mfix-cortex-a57-aes-1742098`` or + ``-mfix-cortex-a72-aes-1655431``. The pass is enabled when using either of + these cpus with ``-mcpu=`` and can be disabled using + ``-mno-fix-cortex-a57-aes-1742098`` or ``-mno-fix-cortex-a72-aes-1655431``. Deprecated Compiler Flags -------------------------
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