Author: Chen Zheng Date: 2022-04-20T05:14:22-04:00 New Revision: 3c776c70a76e9fe51fd978595315e6cef8e7fbb0
URL: https://github.com/llvm/llvm-project/commit/3c776c70a76e9fe51fd978595315e6cef8e7fbb0 DIFF: https://github.com/llvm/llvm-project/commit/3c776c70a76e9fe51fd978595315e6cef8e7fbb0.diff LOG: [PowerPC] add XLC compat builtin __abs Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D123372 Added: Modified: clang/lib/Basic/Targets/PPC.cpp clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-macros.c Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 1f2f583b9462d..e3ee68cd1fa30 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -208,6 +208,7 @@ static void defineXLCompatMacros(MacroBuilder &Builder) { Builder.defineMacro("__dcbf", "__builtin_dcbf"); Builder.defineMacro("__fmadd", "__builtin_fma"); Builder.defineMacro("__fmadds", "__builtin_fmaf"); + Builder.defineMacro("__abs", "__builtin_abs"); Builder.defineMacro("__labs", "__builtin_labs"); Builder.defineMacro("__llabs", "__builtin_llabs"); Builder.defineMacro("__popcnt4", "__builtin_popcount"); diff --git a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-macros.c b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-macros.c index 268dceaa06cb5..cec1ac6cd5655 100644 --- a/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-macros.c +++ b/clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-macros.c @@ -12,6 +12,19 @@ // Required for size_t. Usually found in stddef.h. typedef __SIZE_TYPE__ size_t; +// BOTH-LABEL: @testabs( +// BOTH-NEXT: entry: +// BOTH-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 +// BOTH-NEXT: store i32 [[A:%.*]], i32* [[A_ADDR]], align 4 +// BOTH-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4 +// BOTH-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[TMP0]] +// BOTH-NEXT: [[ABSCOND:%.*]] = icmp slt i32 [[TMP0]], 0 +// BOTH-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[TMP0]] +// BOTH-NEXT: ret i32 [[ABS]] +signed int testabs(signed int a) { + return __abs(a); +} + // 64BIT-LABEL: @testlabs( // 64BIT-NEXT: entry: // 64BIT-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
