zahiraam updated this revision to Diff 411177.
zahiraam set the repository for this revision to rG LLVM Github Monorepo.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113107/new/
https://reviews.llvm.org/D113107
Files:
clang/docs/LanguageExtensions.rst
clang/docs/ReleaseNotes.rst
clang/lib/Basic/Targets/X86.cpp
clang/lib/Sema/SemaExpr.cpp
clang/test/CodeGen/X86/Float16-arithmetic.c
clang/test/CodeGen/X86/avx512fp16-abi.c
clang/test/CodeGen/X86/avx512fp16-complex-abi.c
clang/test/CodeGen/X86/avx512fp16-complex.c
clang/test/CodeGen/X86/fp16-abi.c
clang/test/CodeGen/X86/fp16-complex-abi.c
clang/test/CodeGen/X86/fp16-complex.c
clang/test/Sema/Float16.c
clang/test/Sema/conversion-target-dep.c
clang/test/SemaCXX/Float16.cpp
Index: clang/test/SemaCXX/Float16.cpp
===================================================================
--- clang/test/SemaCXX/Float16.cpp
+++ clang/test/SemaCXX/Float16.cpp
@@ -1,7 +1,8 @@
-// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s
+// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple spir-unknown-unknown %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple armv7a-linux-gnu %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple aarch64-linux-gnu %s -DHAVE
+// RUN: %clang_cc1 -fsyntax-only -verify -triple i386-pc-linux-gnu %s
#ifdef HAVE
// expected-no-diagnostics
Index: clang/test/Sema/conversion-target-dep.c
===================================================================
--- clang/test/Sema/conversion-target-dep.c
+++ clang/test/Sema/conversion-target-dep.c
@@ -6,7 +6,7 @@
long double ld;
double d;
-_Float16 f16; // x86-error {{_Float16 is not supported on this target}}
+_Float16 f16;
int main(void) {
ld = d; // x86-warning {{implicit conversion increases floating-point precision: 'double' to 'long double'}}
Index: clang/test/Sema/Float16.c
===================================================================
--- clang/test/Sema/Float16.c
+++ clang/test/Sema/Float16.c
@@ -1,8 +1,9 @@
-// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s
+// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple x86_64-linux-pc -target-feature +avx512fp16 %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple spir-unknown-unknown %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple armv7a-linux-gnu %s -DHAVE
// RUN: %clang_cc1 -fsyntax-only -verify -triple aarch64-linux-gnu %s -DHAVE
+// RUN: %clang_cc1 -fsyntax-only -verify -triple i386-pc-linux-gnu %s
#ifndef HAVE
// expected-error@+2{{_Float16 is not supported on this target}}
Index: clang/test/CodeGen/X86/fp16-complex.c
===================================================================
--- clang/test/CodeGen/X86/fp16-complex.c
+++ clang/test/CodeGen/X86/fp16-complex.c
@@ -1,4 +1,5 @@
// RUN: %clang_cc1 %s -O0 -emit-llvm -triple x86_64-unknown-unknown -target-feature +avx512fp16 -o - | FileCheck %s --check-prefix=X86
+// RUN: %clang_cc1 %s -O0 -emit-llvm -triple x86_64-unknown-unknown -o - | FileCheck %s --check-prefixes=X86
_Float16 _Complex add_half_rr(_Float16 a, _Float16 b) {
// X86-LABEL: @add_half_rr(
Index: clang/test/CodeGen/X86/fp16-abi.c
===================================================================
--- clang/test/CodeGen/X86/fp16-abi.c
+++ clang/test/CodeGen/X86/fp16-abi.c
@@ -1,5 +1,7 @@
// RUN: %clang_cc1 -triple x86_64-linux -emit-llvm -target-feature +avx512fp16 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-C
+// RUN: %clang_cc1 -triple x86_64-linux -emit-llvm < %s | FileCheck %s --check-prefixes=CHECK,CHECK-C
// RUN: %clang_cc1 -triple x86_64-linux -emit-llvm -target-feature +avx512fp16 -x c++ -std=c++11 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-CPP
+// RUN: %clang_cc1 -triple x86_64-linux -emit-llvm -x c++ -std=c++11 < %s | FileCheck %s --check-prefixes=CHECK,CHECK-CPP
struct half1 {
_Float16 a;
@@ -150,7 +152,8 @@
}
struct float2 {
- struct {} s;
+ struct {
+ } s;
float a;
float b;
};
@@ -163,7 +166,8 @@
struct float3 {
float a;
- struct {} s;
+ struct {
+ } s;
float b;
};
@@ -174,7 +178,8 @@
}
struct shalf2 {
- struct {} s;
+ struct {
+ } s;
_Float16 a;
_Float16 b;
};
@@ -187,9 +192,11 @@
struct halfs2 {
_Float16 a;
- struct {} s1;
+ struct {
+ } s1;
_Float16 b;
- struct {} s2;
+ struct {
+ } s2;
};
_Float16 fs2(struct shalf2 s) {
Index: clang/test/CodeGen/X86/Float16-arithmetic.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/X86/Float16-arithmetic.c
@@ -0,0 +1,71 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown \
+// RUN: -emit-llvm -o - %s | FileCheck %s --check-prefixes=CHECK
+
+_Float16 add1(_Float16 a, _Float16 b) {
+ // CHECK-LABEL: define {{.*}} half @add1
+ // CHECK: alloca half
+ // CHECK: alloca half
+ // CHECK: store half {{.*}}, half*
+ // CHECK: store half {{.*}}, half*
+ // CHECK: load half, half*
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: fadd float {{.*}}, {{.*}}
+ // CHECK: fptrunc float {{.*}} to half
+ // CHECK: ret half
+ return a + b;
+}
+
+_Float16 add2(_Float16 a, _Float16 b, _Float16 c) {
+ // CHECK-LABEL: define dso_local half @add2
+ // CHECK: alloca half
+ // CHECK: alloca half
+ // CHECK: alloca half
+ // CHECK: store half {{.*}}, half*
+ // CHECK: store half {{.*}}, half*
+ // CHECK: store half {{.*}}, half*
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: fadd float {{.*}}, {{.*}}
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: fadd float {{.*}}, {{.*}}
+ // CHECK: fptrunc float {{.*}} to half
+ // CHECK: ret half
+ return a + b + c;
+}
+
+_Float16 div(_Float16 a, _Float16 b) {
+ // CHECK-LABEL: define dso_local half @div
+ // CHECK: alloca half
+ // CHECK: alloca half
+ // CHECK: store half {{.*}}, half*
+ // CHECK: store half {{.*}}, half*
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: fdiv float {{.*}}, {{.*}}
+ // CHECK: fptrunc float {{.*}} to half
+ // CHECK: ret half
+ return a / b;
+}
+
+_Float16 mul(_Float16 a, _Float16 b) {
+ // CHECK-LABEL: define dso_local half @mul
+ // CHECK: alloca half
+ // CHECK: alloca half
+ // CHECK: store half {{.*}}, half*
+ // CHECK: store half {{.*}}, half*
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: load half, half* {{.*}}
+ // CHECK: fpext half {{.*}} to float
+ // CHECK: fmul float {{.*}}, {{.*}}
+ // CHECK: fptrunc float {{.*}} to half
+ // CHECK: ret half
+ return a * b;
+}
Index: clang/lib/Sema/SemaExpr.cpp
===================================================================
--- clang/lib/Sema/SemaExpr.cpp
+++ clang/lib/Sema/SemaExpr.cpp
@@ -807,6 +807,15 @@
}
}
+ if (Ty->isFloat16Type() && Context.getTargetInfo().hasFloat16Type() &&
+ !Context.getTargetInfo().hasLegalHalfType()) {
+ if (Context.getFloatingTypeOrder(Context.FloatTy, Ty) >= 0)
+ return Ty->isComplexType()
+ ? ImpCastExprToType(E, Context.getComplexType(Context.FloatTy),
+ CK_FloatingComplexCast)
+ : ImpCastExprToType(E, Context.FloatTy, CK_FloatingCast);
+ }
+
// Half FP have to be promoted to float unless it is natively supported
if (Ty->isHalfType() && !getLangOpts().NativeHalfType)
return ImpCastExprToType(Res.get(), Context.FloatTy, CK_FloatingCast);
@@ -1133,7 +1142,7 @@
QualType ResultType = S.Context.getComplexType(LHSElementType);
if (Order < 0) {
- // Promote the precision of the LHS if not an assignment.
+ // Promote the precision of the LHS
ResultType = S.Context.getComplexType(RHSElementType);
if (!IsCompAssign) {
if (LHSComplexType)
@@ -1143,11 +1152,20 @@
LHS = S.ImpCastExprToType(LHS.get(), RHSElementType, CK_FloatingCast);
}
} else if (Order > 0) {
- // Promote the precision of the RHS.
- if (RHSComplexType)
- RHS = S.ImpCastExprToType(RHS.get(), ResultType, CK_FloatingComplexCast);
- else
- RHS = S.ImpCastExprToType(RHS.get(), LHSElementType, CK_FloatingCast);
+ if (RHSElementType->isFloat16Type() && LHSType->isFloatingType() &&
+ S.getASTContext().getTargetInfo().hasFloat16Type() &&
+ !S.getASTContext().getTargetInfo().hasLegalHalfType()) {
+ // Wen the RHS is complex_float16 and the LHSType is a Float
+ // then promote the precision of the LHS (less precise type is converted).
+ ResultType = S.Context.getComplexType(RHSElementType);
+ LHS = S.ImpCastExprToType(LHS.get(), RHSElementType, CK_FloatingCast);
+ } else
+ // Promote the precision of the RHS.
+ if (RHSComplexType)
+ RHS =
+ S.ImpCastExprToType(RHS.get(), ResultType, CK_FloatingComplexCast);
+ else
+ RHS = S.ImpCastExprToType(RHS.get(), LHSElementType, CK_FloatingCast);
}
return ResultType;
}
Index: clang/lib/Basic/Targets/X86.cpp
===================================================================
--- clang/lib/Basic/Targets/X86.cpp
+++ clang/lib/Basic/Targets/X86.cpp
@@ -239,7 +239,7 @@
HasAVX512ER = true;
} else if (Feature == "+avx512fp16") {
HasAVX512FP16 = true;
- HasFloat16 = true;
+ HasLegalHalfType = true;
} else if (Feature == "+avx512pf") {
HasAVX512PF = true;
} else if (Feature == "+avx512dq") {
@@ -369,6 +369,8 @@
.Default(NoXOP);
XOPLevel = std::max(XOPLevel, XLevel);
}
+ // Turn on _float16 for x86 (feature sse2)
+ HasFloat16 = SSELevel >= SSE2;
// LLVM doesn't have a separate switch for fpmath, so only accept it if it
// matches the selected sse level.
Index: clang/docs/ReleaseNotes.rst
===================================================================
--- clang/docs/ReleaseNotes.rst
+++ clang/docs/ReleaseNotes.rst
@@ -165,6 +165,9 @@
DWARF Support in Clang
----------------------
+- Support for ``AVX512-FP16`` instructions has been added.
+- Support for ``_Float16`` type has been added.
+
Arm and AArch64 Support in Clang
--------------------------------
Index: clang/docs/LanguageExtensions.rst
===================================================================
--- clang/docs/LanguageExtensions.rst
+++ clang/docs/LanguageExtensions.rst
@@ -677,7 +677,7 @@
* 64-bit ARM (AArch64)
* AMDGPU
* SPIR
-* X86 (Only available under feature AVX512-FP16)
+* X86 (Enabled with feature SSE2 and up)
``_Float16`` will be supported on more targets as they define ABIs for it.
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