Author: Zakk Chen Date: 2022-02-08T18:37:43-08:00 New Revision: cfe7f690367b9d2903f099162f0bcbbfd18c7610
URL: https://github.com/llvm/llvm-project/commit/cfe7f690367b9d2903f099162f0bcbbfd18c7610 DIFF: https://github.com/llvm/llvm-project/commit/cfe7f690367b9d2903f099162f0bcbbfd18c7610.diff LOG: [RISCV][NFC] Refactor RISCVISAInfo. 1. Remove computeDefaultABIFromArch and add computeDefaultABI in RISCVISAInfo. 2. Add parseFeatureBits which may used in D118333. Differential Revision: https://reviews.llvm.org/D119250 Added: Modified: clang/lib/Basic/Targets/RISCV.cpp clang/lib/Driver/ToolChains/Arch/RISCV.cpp llvm/include/llvm/Support/RISCVISAInfo.h llvm/include/llvm/Support/TargetParser.h llvm/lib/Support/RISCVISAInfo.cpp llvm/lib/Support/TargetParser.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp index 0680cad5b07c5..ca72cf200d466 100644 --- a/clang/lib/Basic/Targets/RISCV.cpp +++ b/clang/lib/Basic/Targets/RISCV.cpp @@ -272,7 +272,7 @@ bool RISCVTargetInfo::handleTargetFeatures(std::vector<std::string> &Features, } if (ABI.empty()) - ABI = llvm::RISCV::computeDefaultABIFromArch(*ISAInfo).str(); + ABI = ISAInfo->computeDefaultABI().str(); return true; } diff --git a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp index 7ad8ca69bed5d..8a8ed20986c57 100644 --- a/clang/lib/Driver/ToolChains/Arch/RISCV.cpp +++ b/clang/lib/Driver/ToolChains/Arch/RISCV.cpp @@ -198,7 +198,7 @@ StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) { // Ignore parsing error, just go 3rd step. consumeError(ParseResult.takeError()); else - return llvm::RISCV::computeDefaultABIFromArch(**ParseResult); + return (*ParseResult)->computeDefaultABI(); // 3. Choose a default based on the triple // diff --git a/llvm/include/llvm/Support/RISCVISAInfo.h b/llvm/include/llvm/Support/RISCVISAInfo.h index 7fa0e6ee3acfe..6e34779545c16 100644 --- a/llvm/include/llvm/Support/RISCVISAInfo.h +++ b/llvm/include/llvm/Support/RISCVISAInfo.h @@ -66,6 +66,7 @@ class RISCVISAInfo { bool hasExtension(StringRef Ext) const; std::string toString() const; std::vector<std::string> toFeatureVector() const; + StringRef computeDefaultABI() const; static bool isSupportedExtensionFeature(StringRef Ext); static bool isSupportedExtension(StringRef Ext); diff --git a/llvm/include/llvm/Support/TargetParser.h b/llvm/include/llvm/Support/TargetParser.h index 02a8d72483db6..d4880d638cf72 100644 --- a/llvm/include/llvm/Support/TargetParser.h +++ b/llvm/include/llvm/Support/TargetParser.h @@ -170,7 +170,6 @@ void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); void fillValidTuneCPUArchList(SmallVectorImpl<StringRef> &Values, bool IsRV64); bool getCPUFeaturesExceptStdExt(CPUKind Kind, std::vector<StringRef> &Features); StringRef resolveTuneCPUAlias(StringRef TuneCPU, bool IsRV64); -StringRef computeDefaultABIFromArch(const llvm::RISCVISAInfo &ISAInfo); } // namespace RISCV diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp index a6d4e0b2feba6..598eceaa6c274 100644 --- a/llvm/lib/Support/RISCVISAInfo.cpp +++ b/llvm/lib/Support/RISCVISAInfo.cpp @@ -914,3 +914,18 @@ RISCVISAInfo::postProcessAndChecking(std::unique_ptr<RISCVISAInfo> &&ISAInfo) { return std::move(Result); return std::move(ISAInfo); } + +StringRef RISCVISAInfo::computeDefaultABI() const { + if (XLen == 32) { + if (hasExtension("d")) + return "ilp32d"; + if (hasExtension("e")) + return "ilp32e"; + return "ilp32"; + } else if (XLen == 64) { + if (hasExtension("d")) + return "lp64d"; + return "lp64"; + } + llvm_unreachable("Invalid XLEN"); +} diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp index 0105cd2e81532..b3eb43e2038bf 100644 --- a/llvm/lib/Support/TargetParser.cpp +++ b/llvm/lib/Support/TargetParser.cpp @@ -329,21 +329,6 @@ bool getCPUFeaturesExceptStdExt(CPUKind Kind, return true; } -StringRef computeDefaultABIFromArch(const llvm::RISCVISAInfo &ISAInfo) { - if (ISAInfo.getXLen() == 32) { - if (ISAInfo.hasExtension("d")) - return "ilp32d"; - if (ISAInfo.hasExtension("e")) - return "ilp32e"; - return "ilp32"; - } else if (ISAInfo.getXLen() == 64) { - if (ISAInfo.hasExtension("d")) - return "lp64d"; - return "lp64"; - } - llvm_unreachable("Invalid XLEN"); -} - } // namespace RISCV } // namespace llvm diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp index 144e761f002dc..bd99596e54c13 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp @@ -16,6 +16,7 @@ #include "llvm/ADT/Triple.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/Support/RISCVISAInfo.h" +#include "llvm/Support/TargetParser.h" #include "llvm/Support/raw_ostream.h" namespace llvm { @@ -106,13 +107,17 @@ void validate(const Triple &TT, const FeatureBitset &FeatureBits) { report_fatal_error("RV32E can't be enabled for an RV64 target"); } -void toFeatureVector(std::vector<std::string> &FeatureVector, - const FeatureBitset &FeatureBits) { +llvm::Expected<std::unique_ptr<RISCVISAInfo>> +parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits) { + unsigned XLen = IsRV64 ? 64 : 32; + std::vector<std::string> FeatureVector; + // Convert FeatureBitset to FeatureVector. for (auto Feature : RISCVFeatureKV) { if (FeatureBits[Feature.Value] && llvm::RISCVISAInfo::isSupportedExtensionFeature(Feature.Key)) FeatureVector.push_back(std::string("+") + Feature.Key); } + return llvm::RISCVISAInfo::parseFeatures(XLen, FeatureVector); } } // namespace RISCVFeatures diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h index 01c6bd90ea587..e1b515f2aded3 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h @@ -18,6 +18,7 @@ #include "llvm/ADT/StringSwitch.h" #include "llvm/MC/MCInstrDesc.h" #include "llvm/MC/SubtargetFeature.h" +#include "llvm/Support/RISCVISAInfo.h" namespace llvm { @@ -344,9 +345,8 @@ namespace RISCVFeatures { // triple. Exits with report_fatal_error if not. void validate(const Triple &TT, const FeatureBitset &FeatureBits); -// Convert FeatureBitset to FeatureVector. -void toFeatureVector(std::vector<std::string> &FeatureVector, - const FeatureBitset &FeatureBits); +llvm::Expected<std::unique_ptr<RISCVISAInfo>> +parseFeatureBits(bool IsRV64, const FeatureBitset &FeatureBits); } // namespace RISCVFeatures diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp index 2f016374e6a23..aa95331251c95 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp @@ -45,11 +45,8 @@ void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) { else emitAttribute(RISCVAttrs::STACK_ALIGN, RISCVAttrs::ALIGN_16); - unsigned XLen = STI.hasFeature(RISCV::Feature64Bit) ? 64 : 32; - std::vector<std::string> FeatureVector; - RISCVFeatures::toFeatureVector(FeatureVector, STI.getFeatureBits()); - - auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeatureVector); + auto ParseResult = RISCVFeatures::parseFeatureBits( + STI.hasFeature(RISCV::Feature64Bit), STI.getFeatureBits()); if (!ParseResult) { /* Assume any error about features should handled earlier. */ consumeError(ParseResult.takeError()); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
