pengfei added a comment. > So xorl %ecx, %edx doesn't zero out all 64-bits of %rcx and %rdx? That's two > 32-bit writes to two different registers, isn't it?
`xorl %ecx, %edx` only zero out bit 63:32 of `rdx`. 1. There's only 1 write to register in the instruction, i.e. `%edx`; 2. As a src, none bit of `%ecx` will be changed after the instruction; 3. `xorl` is not a zeroing instruction, bit 31:0 of `rdx` happens to zero only if `%ecx` == `%edx `; So the values after the instuction are: RCX = RCX_old RDX[63:32] = 0 RDX[31:0] = RCX_old[31:0] ^ RDX_old[31:0] Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110869/new/ https://reviews.llvm.org/D110869 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
