[PATCH] D114407: [CUDA][SPIRV] Use OpenCLKernel CC for CUDA -> SPIRV

[Artem Belevich via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGabbdc13e6803: [CUDA][SPIRV] Use OpenCLKernel CC for CUDA 
-> SPIRV (authored by dcastagna, committed by tra).
Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114407/new/

https://reviews.llvm.org/D114407

Files:
  clang/lib/Sema/SemaType.cpp
  clang/test/CodeGenCUDASPIRV/kernel-cc.cu


Index: clang/test/CodeGenCUDASPIRV/kernel-cc.cu
===================================================================
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-cc.cu
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fcuda-is-device -triple spirv32 -o - -emit-llvm -x cuda %s 
 | FileCheck %s
+// RUN: %clang_cc1 -fcuda-is-device -triple spirv64 -o - -emit-llvm -x cuda %s 
 | FileCheck %s
+
+// Verifies that building CUDA targeting SPIR-V {32,64} generates LLVM IR with
+// spir_kernel attributes for kernel functions.
+
+// CHECK: define spir_kernel void @_Z6kernelv()
+
+__attribute__((global)) void kernel() { return; }
Index: clang/lib/Sema/SemaType.cpp
===================================================================
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -3940,6 +3940,20 @@
         break;
       }
     }
+  } else if (S.getLangOpts().CUDA) {
+    // If we're compiling CUDA/HIP code and targeting SPIR-V we need to make
+    // sure the kernels will be marked with the right calling convention so 
that
+    // they will be visible by the APIs that ingest SPIR-V.
+    llvm::Triple Triple = S.Context.getTargetInfo().getTriple();
+    if (Triple.getArch() == llvm::Triple::spirv32 ||
+        Triple.getArch() == llvm::Triple::spirv64) {
+      for (const ParsedAttr &AL : D.getDeclSpec().getAttributes()) {
+        if (AL.getKind() == ParsedAttr::AT_CUDAGlobal) {
+          CC = CC_OpenCLKernel;
+          break;
+        }
+      }
+    }
   }
 
   return CC;



Index: clang/test/CodeGenCUDASPIRV/kernel-cc.cu
===================================================================
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-cc.cu
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -fcuda-is-device -triple spirv32 -o - -emit-llvm -x cuda %s  | FileCheck %s
+// RUN: %clang_cc1 -fcuda-is-device -triple spirv64 -o - -emit-llvm -x cuda %s  | FileCheck %s
+
+// Verifies that building CUDA targeting SPIR-V {32,64} generates LLVM IR with
+// spir_kernel attributes for kernel functions.
+
+// CHECK: define spir_kernel void @_Z6kernelv()
+
+__attribute__((global)) void kernel() { return; }
Index: clang/lib/Sema/SemaType.cpp
===================================================================
--- clang/lib/Sema/SemaType.cpp
+++ clang/lib/Sema/SemaType.cpp
@@ -3940,6 +3940,20 @@
         break;
       }
     }
+  } else if (S.getLangOpts().CUDA) {
+    // If we're compiling CUDA/HIP code and targeting SPIR-V we need to make
+    // sure the kernels will be marked with the right calling convention so that
+    // they will be visible by the APIs that ingest SPIR-V.
+    llvm::Triple Triple = S.Context.getTargetInfo().getTriple();
+    if (Triple.getArch() == llvm::Triple::spirv32 ||
+        Triple.getArch() == llvm::Triple::spirv64) {
+      for (const ParsedAttr &AL : D.getDeclSpec().getAttributes()) {
+        if (AL.getKind() == ParsedAttr::AT_CUDAGlobal) {
+          CC = CC_OpenCLKernel;
+          break;
+        }
+      }
+    }
   }
 
   return CC;

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