adamdb5 updated this revision to Diff 388746. adamdb5 added a comment. Thanks for the feedback, please see the following comments:
bit_HYPERVISOR: This seems to be standardized. See the following links: - https://docs.microsoft.com/en-us/virtualization/hyper-v-on-windows/tlfs/feature-discovery - https://kb.vmware.com/s/article/1009458 Let me know if you think this shouldn't be added. bit_IA64: I'm not entirely sure where I found this. I think it might have been wikipedia or something. I have removed it. bit_TSCADJUST: Changed to match Intel SDM (IA32_TSC_ADJUST). bit_FPUEXCEPT: Changed to match Intel SDM (FDP_EXCPTN_ONLY). bit_IA57: Appears to be defined in June 2021 Intel SDM at Vol. 2A 3-219 (PDF page 794). bit_AVX512VPCINT: Typo, changed to match Intel SDM (AVX512VP2INT). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D114318/new/ https://reviews.llvm.org/D114318 Files: clang/lib/Headers/cpuid.h
Index: clang/lib/Headers/cpuid.h =================================================================== --- clang/lib/Headers/cpuid.h +++ clang/lib/Headers/cpuid.h @@ -85,6 +85,7 @@ #define bit_TM2 0x00000100 #define bit_SSSE3 0x00000200 #define bit_CNXTID 0x00000400 +#define bit_SDBG 0x00000800 #define bit_FMA 0x00001000 #define bit_CMPXCHG16B 0x00002000 #define bit_xTPR 0x00004000 @@ -106,6 +107,7 @@ #define bit_AVX 0x10000000 #define bit_F16C 0x20000000 #define bit_RDRND 0x40000000 +#define bit_HYPERVISOR 0x80000000 /* Features in %edx for leaf 1 */ #define bit_FPU 0x00000001 @@ -141,35 +143,42 @@ #define bit_PBE 0x80000000 /* Features in %ebx for leaf 7 sub-leaf 0 */ -#define bit_FSGSBASE 0x00000001 -#define bit_SGX 0x00000004 -#define bit_BMI 0x00000008 -#define bit_HLE 0x00000010 -#define bit_AVX2 0x00000020 -#define bit_SMEP 0x00000080 -#define bit_BMI2 0x00000100 -#define bit_ENH_MOVSB 0x00000200 -#define bit_INVPCID 0x00000400 -#define bit_RTM 0x00000800 -#define bit_MPX 0x00004000 -#define bit_AVX512F 0x00010000 -#define bit_AVX512DQ 0x00020000 -#define bit_RDSEED 0x00040000 -#define bit_ADX 0x00080000 -#define bit_AVX512IFMA 0x00200000 -#define bit_CLFLUSHOPT 0x00800000 -#define bit_CLWB 0x01000000 -#define bit_AVX512PF 0x04000000 -#define bit_AVX512ER 0x08000000 -#define bit_AVX512CD 0x10000000 -#define bit_SHA 0x20000000 -#define bit_AVX512BW 0x40000000 -#define bit_AVX512VL 0x80000000 +#define bit_FSGSBASE 0x00000001 +#define bit_IA32_TSC_ADJUST 0x00000002 +#define bit_SGX 0x00000004 +#define bit_BMI 0x00000008 +#define bit_HLE 0x00000010 +#define bit_AVX2 0x00000020 +#define bit_FDP_EXCPTN_ONLY 0x00000040 +#define bit_SMEP 0x00000080 +#define bit_BMI2 0x00000100 +#define bit_ENH_MOVSB 0x00000200 +#define bit_INVPCID 0x00000400 +#define bit_RTM 0x00000800 +#define bit_RDTM 0x00001000 +#define bit_DEPRFPUCSDS 0x00002000 +#define bit_MPX 0x00004000 +#define bit_RDTA 0x00008000 +#define bit_AVX512F 0x00010000 +#define bit_AVX512DQ 0x00020000 +#define bit_RDSEED 0x00040000 +#define bit_ADX 0x00080000 +#define bit_AVX512IFMA 0x00200000 +#define bit_CLFLUSHOPT 0x00800000 +#define bit_CLWB 0x01000000 +#define bit_IPT 0x02000000 +#define bit_AVX512PF 0x04000000 +#define bit_AVX512ER 0x08000000 +#define bit_AVX512CD 0x10000000 +#define bit_SHA 0x20000000 +#define bit_AVX512BW 0x40000000 +#define bit_AVX512VL 0x80000000 /* Features in %ecx for leaf 7 sub-leaf 0 */ #define bit_PREFTCHWT1 0x00000001 #define bit_AVX512VBMI 0x00000002 -#define bit_PKU 0x00000004 +#define bit_UMIP 0x00000004 +#define bit_PKU 0x00000008 #define bit_OSPKE 0x00000010 #define bit_WAITPKG 0x00000020 #define bit_AVX512VBMI2 0x00000040 @@ -179,18 +188,27 @@ #define bit_VPCLMULQDQ 0x00000400 #define bit_AVX512VNNI 0x00000800 #define bit_AVX512BITALG 0x00001000 +#define bit_TME_EN 0x00002000 #define bit_AVX512VPOPCNTDQ 0x00004000 +#define bit_LA57 0x00010000 #define bit_RDPID 0x00400000 +#define bit_KL 0x00800000 #define bit_CLDEMOTE 0x02000000 #define bit_MOVDIRI 0x08000000 #define bit_MOVDIR64B 0x10000000 #define bit_ENQCMD 0x20000000 +#define bit_SGX_LC 0x40000000 +#define bit_PKS 0x80000000 /* Features in %edx for leaf 7 sub-leaf 0 */ #define bit_AVX5124VNNIW 0x00000004 #define bit_AVX5124FMAPS 0x00000008 +#define bit_FSRM 0x00000010 #define bit_UINTR 0x00000020 +#define bit_AVX512VP2INT 0x00000100 +#define bit_MD_CLEAR 0x00000400 #define bit_SERIALIZE 0x00004000 +#define bit_HYBRID 0x00008000 #define bit_TSXLDTRK 0x00010000 #define bit_PCONFIG 0x00040000 #define bit_IBT 0x00100000 @@ -198,6 +216,12 @@ #define bit_AVX512FP16 0x00800000 #define bit_AMXTILE 0x01000000 #define bit_AMXINT8 0x02000000 +#define bit_IBRS_IBPB 0x04000000 +#define bit_STIBP 0x08000000 +#define bit_L1DFLUSH 0x10000000 +#define bit_IA32_ARCH_CAP 0x20000000 +#define bit_IA32_CORE_CAP 0x40000000 +#define bit_SSBD 0x80000000 /* Features in %eax for leaf 7 sub-leaf 1 */ #define bit_AVXVNNI 0x00000008
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