[PATCH] D109710: [PowerPC] Add range checks for P10 Vector Builtins

[Amy Kwan via Phabricator via cfe-commits]

amyk added a comment.

`builtins-ppc-p10vector.c` looks like it needs to be updated from the failing 
test case.



================
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:1373
 vector signed int test_vec_vec_splati_ins_si(void) {
+  // CHECK-BE: [[T0:%.+]]] = and %{{.+}}, i32 1
   // CHECK-BE: insertelement <4 x i32> %{{.+}}, i32 %{{.+}}, i32 %{{.+}}
----------------
Is the `i32` supposed to be on the first argument?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109710/new/

https://reviews.llvm.org/D109710

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