Author: Kai Luo Date: 2021-07-29T14:49:26Z New Revision: e4902e69e99d07d6d311425d87d4c1d075b72bf8
URL: https://github.com/llvm/llvm-project/commit/e4902e69e99d07d6d311425d87d4c1d075b72bf8 DIFF: https://github.com/llvm/llvm-project/commit/e4902e69e99d07d6d311425d87d4c1d075b72bf8.diff LOG: [PowerPC] Fix return type of XL compat CAS `__compare_and_swap*` should return `i32` rather than `i1`. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D107077 Added: Modified: clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtins-ppc-xlcompat-cas.c Removed: ################################################################################ diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index d9b2a5fe16bec..b316a865f2fc7 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -15808,7 +15808,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, // store. Value *LoadedVal = Pair.first.getScalarVal(); Builder.CreateStore(LoadedVal, OldValAddr); - return Pair.second; + return Builder.CreateZExt(Pair.second, Builder.getInt32Ty()); } case PPC::BI__builtin_ppc_fetch_and_add: case PPC::BI__builtin_ppc_fetch_and_addlp: { diff --git a/clang/test/CodeGen/builtins-ppc-xlcompat-cas.c b/clang/test/CodeGen/builtins-ppc-xlcompat-cas.c index cd66eb09d36f3..9407f696d6ff9 100644 --- a/clang/test/CodeGen/builtins-ppc-xlcompat-cas.c +++ b/clang/test/CodeGen/builtins-ppc-xlcompat-cas.c @@ -20,10 +20,11 @@ // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i32, i1 } [[TMP2]], 0 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i32, i1 } [[TMP2]], 1 // CHECK-NEXT: store i32 [[TMP3]], i32* [[B_ADDR]], align 4 -// CHECK-NEXT: ret void +// CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32 +// CHECK-NEXT: ret i32 [[TMP5]] // -void test_builtin_ppc_compare_and_swap(int a, int b, int c) { - __compare_and_swap(&a, &b, c); +int test_builtin_ppc_compare_and_swap(int a, int b, int c) { + return __compare_and_swap(&a, &b, c); } @@ -41,9 +42,10 @@ void test_builtin_ppc_compare_and_swap(int a, int b, int c) { // CHECK-NEXT: [[TMP3:%.*]] = extractvalue { i64, i1 } [[TMP2]], 0 // CHECK-NEXT: [[TMP4:%.*]] = extractvalue { i64, i1 } [[TMP2]], 1 // CHECK-NEXT: store i64 [[TMP3]], i64* [[B_ADDR]], align 8 -// CHECK-NEXT: ret void +// CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[TMP4]] to i32 +// CHECK-NEXT: ret i32 [[TMP5]] // -void test_builtin_ppc_compare_and_swaplp(long a, long b, long c) { - __compare_and_swaplp(&a, &b, c); +int test_builtin_ppc_compare_and_swaplp(long a, long b, long c) { + return __compare_and_swaplp(&a, &b, c); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
