LuoYuanke added inline comments.
================
Comment at: llvm/lib/Target/X86/X86FastTileConfig.cpp:124
bool X86FastTileConfig::isTileLoad(MachineInstr &MI) {
+ return MI.getOpcode() == X86::PTILELOADDV ||
----------------
Also add the stream load for X86PreAMXConfig.cpp: isTileLoad().
================
Comment at: llvm/lib/Target/X86/X86InstrAMX.td:57
+ def PTILELOADDT1V : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
+ GR16:$src2,
+ opaquemem:$src3), []>;
----------------
indent.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103784/new/
https://reviews.llvm.org/D103784
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