Conanap created this revision.
Herald added subscribers: shchenz, kbarton, hiraditya, nemanjai.
Conanap requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.
This patch implements trap and FP to and from double conversions. The builtins
generate code that mirror what is generated from the XL compiler. Intrinsics
are named conventionally with builtin_ppc, but are aliased to provide the same
builtin names as the XL compiler.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D103668
Files:
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/Basic/Targets/PPC.h
clang/lib/Sema/SemaChecking.cpp
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-trap.c
@@ -0,0 +1,226 @@
+// RUN: clang -mcpu=pwr7 -m64 -O2 -c -S %s -o - | FileCheck %s
+
+long long lla, llb;
+double da;
+
+void test_tdlgt(void) {
+// CHECK-LABEL: test_tdlgt
+// CHECK: tdlgt
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 1);
+}
+
+void test_xl_tdlgt(void) {
+// CHECK-LABEL: test_xl_tdlgt
+// CHECK: tdlgt
+// CHECK: blr
+
+ __tdw(lla, llb, 1);
+}
+
+void test_tdllt(void) {
+// CHECK-LABEL: test_tdllt
+// CHECK: tdllt
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 2);
+}
+
+void test_xl_tdllt(void) {
+// CHECK-LABEL: test_xl_tdllt
+// CHECK: tdllt
+// CHECK: blr
+
+ __tdw(lla, llb, 2);
+}
+
+void test_tdne3(void) {
+// CHECK-LABEL: test_tdne3
+// CHECK: tdne
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 3);
+}
+
+void test_xl_tdne3(void) {
+// CHECK-LABEL: test_xl_tdne3
+// CHECK: tdne
+// CHECK: blr
+
+ __tdw(lla, llb, 3);
+}
+
+void test_tdeq(void) {
+// CHECK-LABEL: test_tdeq
+// CHECK: tdeq
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 4);
+}
+
+void test_xl_tdeq(void) {
+// CHECK-LABEL: test_xl_tdeq
+// CHECK: tdeq
+// CHECK: blr
+
+ __tdw(lla, llb, 4);
+}
+
+void test_tdlge(void) {
+// CHECK-LABEL: test_tdlge
+// CHECK: tdlge
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 5);
+}
+
+void test_xl_tdlge(void) {
+// CHECK-LABEL: test_xl_tdlge
+// CHECK: tdlge
+// CHECK: blr
+
+ __tdw(lla, llb, 5);
+}
+
+void test_tdlle(void) {
+// CHECK-LABEL: test_tdlle
+// CHECK: tdlle
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 6);
+}
+
+void test_xl_tdlle(void) {
+// CHECK-LABEL: test_xl_tdlle
+// CHECK: tdlle
+// CHECK: blr
+
+ __tdw(lla, llb, 6);
+}
+
+void test_tdgt(void) {
+// CHECK-LABEL: test_tdgt
+// CHECK: tdgt
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 8);
+}
+
+void test_xl_tdgt(void) {
+// CHECK-LABEL: test_xl_tdgt
+// CHECK: tdgt
+// CHECK: blr
+
+ __tdw(lla, llb, 8);
+}
+
+void test_tdge(void) {
+// CHECK-LABEL: test_tdge
+// CHECK: tdge
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 12);
+}
+
+void test_xl_tdge(void) {
+// CHECK-LABEL: test_xl_tdge
+// CHECK: tdge
+// CHECK: blr
+
+ __tdw(lla, llb, 12);
+}
+
+void test_tdlt(void) {
+// CHECK-LABEL: test_tdlt
+// CHECK: tdlt
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 16);
+}
+
+void test_xl_tdlt(void) {
+// CHECK-LABEL: test_xl_tdlt
+// CHECK: tdlt
+// CHECK: blr
+
+ __tdw(lla, llb, 16);
+}
+
+void test_tdle(void) {
+// CHECK-LABEL: test_tdle
+// CHECK: tdle
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 20);
+}
+
+void test_xl_tdle(void) {
+// CHECK-LABEL: test_xl_tdle
+// CHECK: tdle
+// CHECK: blr
+
+ __tdw(lla, llb, 20);
+}
+
+void test_tdne24(void) {
+// CHECK-LABEL: test_tdne24
+// CHECK: tdne
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 24);
+}
+
+void test_xl_tdne24(void) {
+// CHECK-LABEL: test_xl_tdne24
+// CHECK: tdne
+// CHECK: blr
+
+ __tdw(lla, llb, 24);
+}
+
+void test_tdeq31(void) {
+// CHECK-LABEL: test_tdeq31
+// CHECK: tdeq
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 31);
+}
+
+void test_xl_tdeq31(void) {
+// CHECK-LABEL: test_xl_tdeq31
+// CHECK: tdeq
+// CHECK: blr
+
+ __tdw(lla, llb, 31);
+}
+
+void test_td_no_match(void) {
+// CHECK-LABEL: test_td_no_match
+// CHECK: td 13
+// CHECK: blr
+
+ __builtin_ppc_tdw(lla, llb, 13);
+}
+
+void test_xl_td_no_match(void) {
+// CHECK-LABEL: test_xl_td_no_match
+// CHECK: td 13
+// CHECK: blr
+
+ __tdw(lla, llb, 13);
+}
+
+void test_trapd(void) {
+// CHECK-LABEL: test_trapd
+// CHECK: tdnei 3, 0
+// CHECK: blr
+ __builtin_ppc_trapd(da);
+}
+
+void test_xl_trapd(void) {
+// CHECK-LABEL: test_xl_trapd
+// CHECK: tdnei 3, 0
+// CHECK: blr
+ __trapd(da);
+}
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-conversionfunc.c
@@ -0,0 +1,115 @@
+// RUN: clang -mcpu=pwr9 -O2 -c -S %s -o - | FileCheck %s
+
+double a;
+
+double test_fcfid(double a) {
+ // CHECK-LABEL: test_fcfid
+ // CHECK: xscvsxddp 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fcfid(a);
+}
+
+double test_xl_fcfid(double a) {
+ // CHECK-LABEL: test_xl_fcfid
+ // CHECK: xscvsxddp 1, 1
+ // CHECK: blr
+ return __fcfid(a);
+}
+
+double test_fcfud(double a) {
+ // CHECK-LABEL: test_fcfud
+ // CHECK: xscvuxddp 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fcfud(a);
+}
+
+double test_xl_fcfud(double a) {
+ // CHECK-LABEL: test_xl_fcfud
+ // CHECK: xscvuxddp 1, 1
+ // CHECK: blr
+ return __fcfud(a);
+}
+
+double test_fctid(double a) {
+ // CHECK-LABEL: test_fctid
+ // CHECK: fctid 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fctid(a);
+}
+
+double test_xl_fctid(double a) {
+ // CHECK-LABEL: test_xl_fctid
+ // CHECK: fctid 1, 1
+ // CHECK: blr
+ return __fctid(a);
+}
+
+double test_fctidz(double a) {
+ // CHECK-LABEL: test_fctidz
+ // CHECK: xscvdpsxds 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fctidz(a);
+}
+
+double test_xl_fctidz(double a) {
+ // CHECK-LABEL: test_xl_fctidz
+ // CHECK: xscvdpsxds 1, 1
+ // CHECK: blr
+ return __fctidz(a);
+}
+
+double test_fctiw(double a) {
+ // CHECK-LABEL: test_fctiw
+ // CHECK: fctiw 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fctiw(a);
+}
+
+double test_xl_fctiw(double a) {
+ // CHECK-LABEL: test_xl_fctiw
+ // CHECK: fctiw 1, 1
+ // CHECK: blr
+ return __fctiw(a);
+}
+
+double test_fctiwz(double a) {
+ // CHECK-LABEL: test_fctiwz
+ // CHECK: xscvdpsxws 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fctiwz(a);
+}
+
+double test_xl_fctiwz(double a) {
+ // CHECK-LABEL: test_xl_fctiwz
+ // CHECK: xscvdpsxws 1, 1
+ // CHECK: blr
+ return __fctiwz(a);
+}
+
+double test_fctudz(double a) {
+ // CHECK-LABEL: test_fctudz
+ // CHECK: xscvdpuxds 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fctudz(a);
+}
+
+double test_xl_fctudz(double a) {
+ // CHECK-LABEL: test_xl_fctudz
+ // CHECK: xscvdpuxds 1, 1
+ // CHECK: blr
+ return __fctudz(a);
+}
+
+double test_fctuwz(double a) {
+ // CHECK-LABEL: test_fctuwz
+ // CHECK: xscvdpuxws 1, 1
+ // CHECK: blr
+ return __builtin_ppc_fctuwz(a);
+}
+
+double test_xl_fctuwz(double a) {
+ // CHECK-LABEL: test_xl_fctuwz
+ // CHECK: xscvdpuxws 1, 1
+ // CHECK: blr
+ return __fctuwz(a);
+}
Index: llvm/lib/Target/PowerPC/PPCInstrPrefix.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2836,3 +2836,32 @@
def : Pat<(v2i64 (PPCvecinsertelt v2i64:$vDi, i64:$rA, (i64 i))),
(VINSD $vDi, !mul(i, 8), $rA)>;
}
+
+// XL Compatibility
+// twne
+def : Pat<(int_ppc_tw gprc:$A, gprc:$B, 3),
+ (TW 24, $A, $B)>;
+// tweq
+def : Pat<(int_ppc_tw gprc:$A, gprc:$B, 31),
+ (TW 4, $A, $B)>;
+def : Pat<(int_ppc_tw gprc:$A, gprc:$B, i32:$IMM),
+ (TW $IMM, $A, $B)>;
+def : Pat<(int_ppc_trap gprc:$A),
+ (TWI 24, $A, 0)>;
+
+def : Pat<(int_ppc_fcfid f64:$A),
+ (XSCVSXDDP $A)>;
+def : Pat<(int_ppc_fcfud f64:$A),
+ (XSCVUXDDP $A)>;
+def : Pat<(int_ppc_fctid f64:$A),
+ (FCTID $A)>;
+def : Pat<(int_ppc_fctidz f64:$A),
+ (XSCVDPSXDS $A)>;
+def : Pat<(int_ppc_fctiw f64:$A),
+ (FCTIW $A)>;
+def : Pat<(int_ppc_fctiwz f64:$A),
+ (XSCVDPSXWS $A)>;
+def : Pat<(int_ppc_fctudz f64:$A),
+ (XSCVDPUXDS $A)>;
+def : Pat<(int_ppc_fctuwz f64:$A),
+ (XSCVDPUXWS $A)>;
Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1676,3 +1676,17 @@
def SLBSYNC : XForm_0<31, 338, (outs), (ins), "slbsync", IIC_SprSLBSYNC, []>;
} // IsISA3_0
+
+// tdne
+def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, 3),
+ (TD 24, $A, $B)>;
+// tweq, but we can use tdeq instead
+// as XL produces a tweq <regA>, <regA>.
+def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, 31),
+ (TD 4, $A, $B)>;
+def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM),
+ (TD $IMM, $A, $B)>;
+
+// trap, trapd
+def : Pat<(int_ppc_trapd g8rc:$A),
+ (TDI 24, $A, 0)>;
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -151,9 +151,45 @@
: GCCBuiltin<"__builtin_vsx_scalar_insert_exp_qp">,
Intrinsic <[llvm_f128_ty], [llvm_f128_ty, llvm_i64_ty], [IntrNoMem]>;
+ // xl compatibility
+ def int_ppc_tdw
+ : GCCBuiltin<"__builtin_ppc_tdw">,
+ Intrinsic <[], [llvm_i64_ty, llvm_i64_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
+ def int_ppc_tw
+ : GCCBuiltin<"__builtin_ppc_tw">,
+ Intrinsic <[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<2>>]>;
+ def int_ppc_trapd
+ : GCCBuiltin<"__builtin_ppc_trapd">,
+ Intrinsic <[], [llvm_i64_ty], []>;
+ def int_ppc_trap
+ : GCCBuiltin<"__builtin_ppc_trap">,
+ Intrinsic <[], [llvm_i32_ty], []>;
+ def int_ppc_fcfid
+ : GCCBuiltin<"__builtin_ppc_fcfid">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fcfud
+ : GCCBuiltin<"__builtin_ppc_fcfud">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fctid
+ : GCCBuiltin<"__builtin_ppc_fctid">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fctidz
+ : GCCBuiltin<"__builtin_ppc_fctidz">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fctiw
+ : GCCBuiltin<"__builtin_ppc_fctiw">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fctiwz
+ : GCCBuiltin<"__builtin_ppc_fctiwz">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fctudz
+ : GCCBuiltin<"__builtin_ppc_fctudz">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
+ def int_ppc_fctuwz
+ : GCCBuiltin<"__builtin_ppc_fctuwz">,
+ Intrinsic <[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
}
-
let TargetPrefix = "ppc" in { // All PPC intrinsics start with "llvm.ppc.".
/// PowerPC_Vec_Intrinsic - Base class for all altivec intrinsics.
class PowerPC_Vec_Intrinsic<string GCCIntSuffix, list<LLVMType> ret_types,
Index: clang/lib/Sema/SemaChecking.cpp
===================================================================
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3331,6 +3331,10 @@
return SemaBuiltinConstantArgRange(TheCall, 2, 0, 7);
case PPC::BI__builtin_vsx_xxpermx:
return SemaBuiltinConstantArgRange(TheCall, 3, 0, 7);
+ case PPC::BI__builtin_ppc_tw:
+ case PPC::BI__builtin_ppc_tdw: {
+ return SemaBuiltinConstantArgRange(TheCall, 2, 1, 31);
+ }
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
Index: clang/lib/Basic/Targets/PPC.h
===================================================================
--- clang/lib/Basic/Targets/PPC.h
+++ clang/lib/Basic/Targets/PPC.h
@@ -367,6 +367,18 @@
Builder.defineMacro("__dcbtst", "__builtin_ppc_dcbtst");
Builder.defineMacro("__dcbz", "__builtin_ppc_dcbz");
Builder.defineMacro("__icbt", "__builtin_ppc_icbt");
+ Builder.defineMacro("__tdw", "__builtin_ppc_tdw");
+ Builder.defineMacro("__tw", "__builtin_ppc_tw");
+ Builder.defineMacro("__trap", "__builtin_ppc_trap");
+ Builder.defineMacro("__trapd", "__builtin_ppc_trapd");
+ Builder.defineMacro("__fcfid", "__builtin_ppc_fcfid");
+ Builder.defineMacro("__fcfud", "__builtin_ppc_fcfud");
+ Builder.defineMacro("__fctid", "__builtin_ppc_fctid");
+ Builder.defineMacro("__fctidz", "__builtin_ppc_fctidz");
+ Builder.defineMacro("__fctiw", "__builtin_ppc_fctiw");
+ Builder.defineMacro("__fctiwz", "__builtin_ppc_fctiwz");
+ Builder.defineMacro("__fctudz", "__builtin_ppc_fctudz");
+ Builder.defineMacro("__fctuwz", "__builtin_ppc_fctuwz");
}
};
Index: clang/include/clang/Basic/BuiltinsPPC.def
===================================================================
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -29,7 +29,7 @@
#define UNALIASED_CUSTOM_BUILTIN(ID, TYPES, ACCUMULATE) \
CUSTOM_BUILTIN(ID, ID, TYPES, ACCUMULATE)
-// builtins for compatibility with the XL compiler
+// XL Compatibility built-ins
BUILTIN(__builtin_ppc_popcntb, "ULiULi", "")
BUILTIN(__builtin_ppc_eieio, "v", "")
BUILTIN(__builtin_ppc_iospace_eieio, "v", "")
@@ -45,6 +45,18 @@
BUILTIN(__builtin_ppc_dcbtst, "vv*", "")
BUILTIN(__builtin_ppc_dcbz, "vv*", "")
BUILTIN(__builtin_ppc_icbt, "vv*", "")
+BUILTIN(__builtin_ppc_tdw, "vLLiLLiIi", "")
+BUILTIN(__builtin_ppc_tw, "viiIi", "")
+BUILTIN(__builtin_ppc_trap, "vi", "")
+BUILTIN(__builtin_ppc_trapd, "vLi", "")
+BUILTIN(__builtin_ppc_fcfid, "dd", "")
+BUILTIN(__builtin_ppc_fcfud, "dd", "")
+BUILTIN(__builtin_ppc_fctid, "dd", "")
+BUILTIN(__builtin_ppc_fctidz, "dd", "")
+BUILTIN(__builtin_ppc_fctiw, "dd", "")
+BUILTIN(__builtin_ppc_fctiwz, "dd", "")
+BUILTIN(__builtin_ppc_fctudz, "dd", "")
+BUILTIN(__builtin_ppc_fctuwz, "dd", "")
BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
