Author: Nemanja Ivanovic Date: 2021-03-22T23:09:41-05:00 New Revision: 10cc5bcd868c433f9a781aef82178b04e98bd098
URL: https://github.com/llvm/llvm-project/commit/10cc5bcd868c433f9a781aef82178b04e98bd098 DIFF: https://github.com/llvm/llvm-project/commit/10cc5bcd868c433f9a781aef82178b04e98bd098.diff LOG: [PowerPC] Add more missing overloads to altivec.h Add vec_permi as a synonym for vec_xxpermdi (but only for doubleword vectors). Added: Modified: clang/lib/Headers/altivec.h clang/test/CodeGen/builtins-ppc-vsx.c Removed: ################################################################################ diff --git a/clang/lib/Headers/altivec.h b/clang/lib/Headers/altivec.h index 7e154c9b5219..cabb7b225b84 100644 --- a/clang/lib/Headers/altivec.h +++ b/clang/lib/Headers/altivec.h @@ -12589,6 +12589,16 @@ static __inline__ void __ATTRS_o_ai vec_vsx_st(vector unsigned char __a, #ifdef __VSX__ #define vec_xxpermdi __builtin_vsx_xxpermdi #define vec_xxsldwi __builtin_vsx_xxsldwi +#define vec_permi(__a, __b, __c) \ + _Generic((__a), vector signed long long \ + : __builtin_shufflevector((__a), (__b), (((__c) >> 1) & 0x1), \ + (((__c)&0x1) + 2)), \ + vector unsigned long long \ + : __builtin_shufflevector((__a), (__b), (((__c) >> 1) & 0x1), \ + (((__c)&0x1) + 2)), \ + vector double \ + : __builtin_shufflevector((__a), (__b), (((__c) >> 1) & 0x1), \ + (((__c)&0x1) + 2))) #endif /* vec_xor */ diff --git a/clang/test/CodeGen/builtins-ppc-vsx.c b/clang/test/CodeGen/builtins-ppc-vsx.c index 7bfecb13a47e..f6157cf46778 100644 --- a/clang/test/CodeGen/builtins-ppc-vsx.c +++ b/clang/test/CodeGen/builtins-ppc-vsx.c @@ -1976,6 +1976,22 @@ res_vuc = vec_xxpermdi(vuc, vuc, 1); // CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 3> // CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 3> +res_vd = vec_permi(vd, vd, 0); +// CHECK: shufflevector <2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x i32> <i32 0, i32 2> +// CHECK-LE: shufflevector <2 x double> %{{[0-9]+}}, <2 x double> %{{[0-9]+}}, <2 x i32> <i32 0, i32 2> + +res_vsll = vec_permi(vsll, vsll, 2); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 2> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 2> + +res_vull = vec_permi(vull, vull, 3); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 3> + +res_vull = vec_permi(vbll, vbll, 3); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 3> + res_vd = vec_xxsldwi(vd, vd, 0); // CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
