Author: Thomas Lively Date: 2021-01-20T11:28:06-08:00 New Revision: 11802eced5d67394c1dcb5acfaef38b0038c6d90
URL: https://github.com/llvm/llvm-project/commit/11802eced5d67394c1dcb5acfaef38b0038c6d90 DIFF: https://github.com/llvm/llvm-project/commit/11802eced5d67394c1dcb5acfaef38b0038c6d90.diff LOG: [WebAssembly] Prototype new f64x2 conversions As proposed in https://github.com/WebAssembly/simd/pull/383. Differential Revision: https://reviews.llvm.org/D95012 Added: Modified: clang/include/clang/Basic/BuiltinsWebAssembly.def clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtins-wasm.c llvm/include/llvm/IR/IntrinsicsWebAssembly.td llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll llvm/test/MC/WebAssembly/simd-encodings.s Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsWebAssembly.def b/clang/include/clang/Basic/BuiltinsWebAssembly.def index 080c6b5c3a40..bb7d6d379e58 100644 --- a/clang/include/clang/Basic/BuiltinsWebAssembly.def +++ b/clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -206,6 +206,13 @@ TARGET_BUILTIN(__builtin_wasm_widen_high_s_i32x4_i64x2, "V2LLiV4i", "nc", "simd1 TARGET_BUILTIN(__builtin_wasm_widen_low_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_widen_high_u_i32x4_i64x2, "V2LLUiV4Ui", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_convert_low_s_i32x4_f64x2, "V2dV4i", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_convert_low_u_i32x4_f64x2, "V2dV4Ui", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4, "V4iV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4, "V4UiV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_demote_zero_f64x2_f32x4, "V4fV2d", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_promote_low_f32x4_f64x2, "V2dV4f", "nc", "simd128") + TARGET_BUILTIN(__builtin_wasm_load32_zero, "V4ii*", "n", "simd128") TARGET_BUILTIN(__builtin_wasm_load64_zero, "V2LLiLLi*", "n", "simd128") diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index 25ebb67c2ab6..113541bd5024 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -17220,6 +17220,46 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID, Function *Callee = CGM.getIntrinsic(IntNo); return Builder.CreateCall(Callee, Vec); } + case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2: + case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + unsigned IntNo; + switch (BuiltinID) { + case WebAssembly::BI__builtin_wasm_convert_low_s_i32x4_f64x2: + IntNo = Intrinsic::wasm_convert_low_signed; + break; + case WebAssembly::BI__builtin_wasm_convert_low_u_i32x4_f64x2: + IntNo = Intrinsic::wasm_convert_low_unsigned; + break; + } + Function *Callee = CGM.getIntrinsic(IntNo); + return Builder.CreateCall(Callee, Vec); + } + case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4: + case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + unsigned IntNo; + switch (BuiltinID) { + case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4: + IntNo = Intrinsic::wasm_trunc_saturate_zero_signed; + break; + case WebAssembly::BI__builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4: + IntNo = Intrinsic::wasm_trunc_saturate_zero_unsigned; + break; + } + Function *Callee = CGM.getIntrinsic(IntNo); + return Builder.CreateCall(Callee, Vec); + } + case WebAssembly::BI__builtin_wasm_demote_zero_f64x2_f32x4: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_demote_zero); + return Builder.CreateCall(Callee, Vec); + } + case WebAssembly::BI__builtin_wasm_promote_low_f32x4_f64x2: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_promote_low); + return Builder.CreateCall(Callee, Vec); + } case WebAssembly::BI__builtin_wasm_load32_zero: { Value *Ptr = EmitScalarExpr(E->getArg(0)); Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_load32_zero); diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c index d8b61f5d285e..61fc76cd1873 100644 --- a/clang/test/CodeGen/builtins-wasm.c +++ b/clang/test/CodeGen/builtins-wasm.c @@ -976,6 +976,42 @@ u64x2 widen_high_u_i32x4_i64x2(u32x4 x) { // WEBASSEMBLY: ret } +f64x2 convert_low_s_i32x4_f64x2(i32x4 x) { + return __builtin_wasm_convert_low_s_i32x4_f64x2(x); + // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %x) + // WEBASSEMBLY: ret +} + +f64x2 convert_low_u_i32x4_f64x2(u32x4 x) { + return __builtin_wasm_convert_low_u_i32x4_f64x2(x); + // WEBASSEMBLY: call <2 x double> @llvm.wasm.convert.low.unsigned(<4 x i32> %x) + // WEBASSEMBLY: ret +} + +i32x4 trunc_saturate_zero_s_f64x2_i32x4(f64x2 x) { + return __builtin_wasm_trunc_saturate_zero_s_f64x2_i32x4(x); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.trunc.saturate.zero.signed(<2 x double> %x) + // WEBASSEMBLY: ret +} + +u32x4 trunc_saturate_zero_u_f64x2_i32x4(f64x2 x) { + return __builtin_wasm_trunc_saturate_zero_u_f64x2_i32x4(x); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.trunc.saturate.zero.unsigned(<2 x double> %x) + // WEBASSEMBLY: ret +} + +f32x4 wasm_demote_zero_f64x2_f32x4(f64x2 x) { + return __builtin_wasm_demote_zero_f64x2_f32x4(x); + // WEBASSEMBLY: call <4 x float> @llvm.wasm.demote.zero(<2 x double> %x) + // WEBASSEMBLY: ret +} + +f64x2 wasm_promote_low_f32x4_f64x2(f32x4 x) { + return __builtin_wasm_promote_low_f32x4_f64x2(x); + // WEBASSEMBLY: call <2 x double> @llvm.wasm.promote.low(<4 x float> %x) + // WEBASSEMBLY: ret +} + i32x4 load32_zero(int *p) { return __builtin_wasm_load32_zero(p); // WEBASSEMBLY: call <4 x i32> @llvm.wasm.load32.zero(i32* %p) diff --git a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td index c0892ee225f2..d306d0ccb90d 100644 --- a/llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ b/llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -328,6 +328,26 @@ def int_wasm_prefetch_nt : ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>], "", [SDNPMemOperand]>; +// TODO: Remove these if possible if they are merged to the spec. +def int_wasm_convert_low_signed : + Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_convert_low_unsigned : + Intrinsic<[llvm_v2f64_ty], [llvm_v4i32_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_trunc_saturate_zero_signed : + Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_trunc_saturate_zero_unsigned : + Intrinsic<[llvm_v4i32_ty], [llvm_v2f64_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_demote_zero : + Intrinsic<[llvm_v4f32_ty], [llvm_v2f64_ty], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_promote_low : + Intrinsic<[llvm_v2f64_ty], [llvm_v4f32_ty], + [IntrNoMem, IntrSpeculatable]>; + //===----------------------------------------------------------------------===// // Thread-local storage intrinsics //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index 19851e1a786c..9f3d0f4ab2c3 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -1257,6 +1257,20 @@ defm "" : SIMDConvert<I32x4, I16x8, int_wasm_extadd_pairwise_unsigned, "extadd_pairwise_i16x8_u", 0xa6>; +// Prototype f64x2 conversions +defm "" : SIMDConvert<F64x2, I32x4, int_wasm_convert_low_signed, + "convert_low_i32x4_s", 0x53>; +defm "" : SIMDConvert<F64x2, I32x4, int_wasm_convert_low_unsigned, + "convert_low_i32x4_u", 0x54>; +defm "" : SIMDConvert<I32x4, F64x2, int_wasm_trunc_saturate_zero_signed, + "trunc_sat_zero_f64x2_s", 0x55>; +defm "" : SIMDConvert<I32x4, F64x2, int_wasm_trunc_saturate_zero_unsigned, + "trunc_sat_zero_f64x2_u", 0x56>; +defm "" : SIMDConvert<F32x4, F64x2, int_wasm_demote_zero, + "demote_zero_f64x2", 0x57>; +defm "" : SIMDConvert<F64x2, F32x4, int_wasm_promote_low, + "promote_low_f32x4", 0x69>; + //===----------------------------------------------------------------------===// // Quasi-Fused Multiply- Add and Subtract (QFMA/QFMS) //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll index 1475f2fd1b34..59f31f09b7f4 100644 --- a/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ b/llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -566,6 +566,26 @@ define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) { ret <4 x i32> %a } +; CHECK-LABEL: trunc_sat_zero_signed_v4i32: +; SIMD128-NEXT: .functype trunc_sat_zero_signed_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.trunc_sat_zero_f64x2_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.trunc.saturate.zero.signed(<2 x double>) +define <4 x i32> @trunc_sat_zero_signed_v4i32(<2 x double> %a) { + %v = call <4 x i32> @llvm.wasm.trunc.saturate.zero.signed(<2 x double> %a) + ret <4 x i32> %v +} + +; CHECK-LABEL: trunc_sat_zero_unsigned_v4i32: +; SIMD128-NEXT: .functype trunc_sat_zero_unsigned_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.trunc_sat_zero_f64x2_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.trunc.saturate.zero.unsigned(<2 x double>) +define <4 x i32> @trunc_sat_zero_unsigned_v4i32(<2 x double> %a) { + %v = call <4 x i32> @llvm.wasm.trunc.saturate.zero.unsigned(<2 x double> %a) + ret <4 x i32> %v +} + ; ============================================================================== ; 2 x i64 ; ============================================================================== @@ -820,6 +840,16 @@ define <4 x float> @qfms_v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c) { ret <4 x float> %v } +; CHECK-LABEL: demote_zero_v4f32: +; SIMD128-NEXT: .functype demote_zero_v4f32 (v128) -> (v128){{$}} +; SIMD128-NEXT: f32x4.demote_zero_f64x2 $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x float> @llvm.wasm.demote.zero(<2 x double>) +define <4 x float> @demote_zero_v4f32(<2 x double> %a) { + %v = call <4 x float> @llvm.wasm.demote.zero(<2 x double> %a) + ret <4 x float> %v +} + ; ============================================================================== ; 2 x f64 ; ============================================================================== @@ -918,3 +948,33 @@ define <2 x double> @qfms_v2f64(<2 x double> %a, <2 x double> %b, <2 x double> % ) ret <2 x double> %v } + +; CHECK-LABEL: convert_low_signed_v2f64: +; SIMD128-NEXT: .functype convert_low_signed_v2f64 (v128) -> (v128){{$}} +; SIMD128-NEXT: f64x2.convert_low_i32x4_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x double> @llvm.wasm.convert.low.signed(<4 x i32>) +define <2 x double> @convert_low_signed_v2f64(<4 x i32> %a) { + %v = call <2 x double> @llvm.wasm.convert.low.signed(<4 x i32> %a) + ret <2 x double> %v +} + +; CHECK-LABEL: convert_low_unsigned_v2f64: +; SIMD128-NEXT: .functype convert_low_unsigned_v2f64 (v128) -> (v128){{$}} +; SIMD128-NEXT: f64x2.convert_low_i32x4_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x double> @llvm.wasm.convert.low.unsigned(<4 x i32>) +define <2 x double> @convert_low_unsigned_v2f64(<4 x i32> %a) { + %v = call <2 x double> @llvm.wasm.convert.low.unsigned(<4 x i32> %a) + ret <2 x double> %v +} + +; CHECK-LABEL: promote_low_v2f64: +; SIMD128-NEXT: .functype promote_low_v2f64 (v128) -> (v128){{$}} +; SIMD128-NEXT: f64x2.promote_low_f32x4 $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <2 x double> @llvm.wasm.promote.low(<4 x float>) +define <2 x double> @promote_low_v2f64(<4 x float> %a) { + %v = call <2 x double> @llvm.wasm.promote.low(<4 x float> %a) + ret <2 x double> %v +} diff --git a/llvm/test/MC/WebAssembly/simd-encodings.s b/llvm/test/MC/WebAssembly/simd-encodings.s index 8a595a02e94f..7a84548bd584 100644 --- a/llvm/test/MC/WebAssembly/simd-encodings.s +++ b/llvm/test/MC/WebAssembly/simd-encodings.s @@ -742,4 +742,22 @@ main: # CHECK: prefetch.nt 16 # encoding: [0xfd,0xc6,0x01,0x00,0x10] prefetch.nt 16 + # CHECK: f64x2.convert_low_i32x4_s # encoding: [0xfd,0x53] + f64x2.convert_low_i32x4_s + + # CHECK: f64x2.convert_low_i32x4_u # encoding: [0xfd,0x54] + f64x2.convert_low_i32x4_u + + # CHECK: i32x4.trunc_sat_zero_f64x2_s # encoding: [0xfd,0x55] + i32x4.trunc_sat_zero_f64x2_s + + # CHECK: i32x4.trunc_sat_zero_f64x2_u # encoding: [0xfd,0x56] + i32x4.trunc_sat_zero_f64x2_u + + # CHECK: f32x4.demote_zero_f64x2 # encoding: [0xfd,0x57] + f32x4.demote_zero_f64x2 + + # CHECK: f64x2.promote_low_f32x4 # encoding: [0xfd,0x69] + f64x2.promote_low_f32x4 + end_function _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
