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As proposed in https://github.com/WebAssembly/simd/pull/380. This commit makes the new instructions available only via clang builtins and LLVM intrinsics to make their use opt-in while they are still being evaluated for inclusion in the SIMD proposal. Depends on D93771 <https://reviews.llvm.org/D93771>. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D93775 Files: clang/include/clang/Basic/BuiltinsWebAssembly.def clang/lib/CodeGen/CGBuiltin.cpp clang/test/CodeGen/builtins-wasm.c llvm/include/llvm/IR/IntrinsicsWebAssembly.td llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll llvm/test/MC/WebAssembly/simd-encodings.s
Index: llvm/test/MC/WebAssembly/simd-encodings.s =================================================================== --- llvm/test/MC/WebAssembly/simd-encodings.s +++ llvm/test/MC/WebAssembly/simd-encodings.s @@ -724,4 +724,16 @@ # CHECK: i64x2.signselect # encoding: [0xfd,0x94,0x01] i64x2.signselect + # CHECK: i16x8.extadd_pairwise_i8x16_s # encoding: [0xfd,0xc2,0x01] + i16x8.extadd_pairwise_i8x16_s + + # CHECK: i16x8.extadd_pairwise_i8x16_u # encoding: [0xfd,0xc3,0x01] + i16x8.extadd_pairwise_i8x16_u + + # CHECK: i32x4.extadd_pairwise_i16x8_s # encoding: [0xfd,0xa5,0x01] + i32x4.extadd_pairwise_i16x8_s + + # CHECK: i32x4.extadd_pairwise_i16x8_u # encoding: [0xfd,0xa6,0x01] + i32x4.extadd_pairwise_i16x8_u + end_function Index: llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll =================================================================== --- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll +++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll @@ -309,6 +309,26 @@ ret <8 x i16> %a } +; CHECK-LABEL: extadd_pairwise_s_v8i16: +; SIMD128-NEXT: .functype extadd_pairwise_s_v8i16 (v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.extadd_pairwise_i8x16_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16(<16 x i8>) +define <8 x i16> @extadd_pairwise_s_v8i16(<16 x i8> %x) { + %a = call <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16(<16 x i8> %x) + ret <8 x i16> %a +} + +; CHECK-LABEL: extadd_pairwise_u_v8i16: +; SIMD128-NEXT: .functype extadd_pairwise_u_v8i16 (v128) -> (v128){{$}} +; SIMD128-NEXT: i16x8.extadd_pairwise_i8x16_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16(<16 x i8>) +define <8 x i16> @extadd_pairwise_u_v8i16(<16 x i8> %x) { + %a = call <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16(<16 x i8> %x) + ret <8 x i16> %a +} + ; CHECK-LABEL: any_v8i16: ; SIMD128-NEXT: .functype any_v8i16 (v128) -> (i32){{$}} ; SIMD128-NEXT: i16x8.any_true $push[[R:[0-9]+]]=, $0{{$}} @@ -449,6 +469,27 @@ ret <4 x i32> %a } +; CHECK-LABEL: extadd_pairwise_s_v4i32: +; SIMD128-NEXT: .functype extadd_pairwise_s_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.extadd_pairwise_i16x8_s $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32(<8 x i16>) +define <4 x i32> @extadd_pairwise_s_v4i32(<8 x i16> %x) { + %a = call <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32(<8 x i16> %x) + ret <4 x i32> %a +} + +; CHECK-LABEL: extadd_pairwise_u_v4i32: +; SIMD128-NEXT: .functype extadd_pairwise_u_v4i32 (v128) -> (v128){{$}} +; SIMD128-NEXT: i32x4.extadd_pairwise_i16x8_u $push[[R:[0-9]+]]=, $0{{$}} +; SIMD128-NEXT: return $pop[[R]]{{$}} +declare <4 x i32> @llvm.wasm.extadd.pairwise.unsigned.v4i32(<8 x i16>) +define <4 x i32> @extadd_pairwise_u_v4i32(<8 x i16> %x) { + %a = call <4 x i32> @llvm.wasm.extadd.pairwise.unsigned.v4i32(<8 x i16> %x) + ret <4 x i32> %a +} + + ; CHECK-LABEL: any_v4i32: ; SIMD128-NEXT: .functype any_v4i32 (v128) -> (i32){{$}} ; SIMD128-NEXT: i32x4.any_true $push[[R:[0-9]+]]=, $0{{$}} Index: llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td =================================================================== --- llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -1245,6 +1245,17 @@ ) in def : Pat<(t1 (bitconvert (t2 V128:$v))), (t1 V128:$v)>; +// Extended pairwise addition +defm "" : SIMDConvert<I16x8, I8x16, int_wasm_extadd_pairwise_signed, + "extadd_pairwise_i8x16_s", 0xc2>; +defm "" : SIMDConvert<I16x8, I8x16, int_wasm_extadd_pairwise_unsigned, + "extadd_pairwise_i8x16_u", 0xc3>; +defm "" : SIMDConvert<I32x4, I16x8, int_wasm_extadd_pairwise_signed, + "extadd_pairwise_i16x8_s", 0xa5>; +defm "" : SIMDConvert<I32x4, I16x8, int_wasm_extadd_pairwise_unsigned, + "extadd_pairwise_i16x8_u", 0xa6>; + + //===----------------------------------------------------------------------===// // Quasi-Fused Multiply- Add and Subtract (QFMA/QFMS) //===----------------------------------------------------------------------===// Index: llvm/include/llvm/IR/IntrinsicsWebAssembly.td =================================================================== --- llvm/include/llvm/IR/IntrinsicsWebAssembly.td +++ llvm/include/llvm/IR/IntrinsicsWebAssembly.td @@ -290,6 +290,15 @@ [LLVMSubdivide2VectorType<0>, LLVMSubdivide2VectorType<0>], [IntrNoMem, IntrSpeculatable]>; +def int_wasm_extadd_pairwise_signed : + Intrinsic<[llvm_anyvector_ty], + [LLVMSubdivide2VectorType<0>], + [IntrNoMem, IntrSpeculatable]>; +def int_wasm_extadd_pairwise_unsigned : + Intrinsic<[llvm_anyvector_ty], + [LLVMSubdivide2VectorType<0>], + [IntrNoMem, IntrSpeculatable]>; + def int_wasm_signselect : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>], Index: clang/test/CodeGen/builtins-wasm.c =================================================================== --- clang/test/CodeGen/builtins-wasm.c +++ clang/test/CodeGen/builtins-wasm.c @@ -609,6 +609,34 @@ // WEBASSEMBLY-NEXT: ret } +i16x8 extadd_pairwise_i8x16_s_i16x8(i8x16 v) { + return __builtin_wasm_extadd_pairwise_i8x16_s_i16x8(v); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.extadd.pairwise.signed.v8i16( + // WEBASSEMBLY-SAME: <16 x i8> %v) + // WEBASSEMBLY-NEXT: ret +} + +u16x8 extadd_pairwise_i8x16_u_i16x8(u8x16 v) { + return __builtin_wasm_extadd_pairwise_i8x16_u_i16x8(v); + // WEBASSEMBLY: call <8 x i16> @llvm.wasm.extadd.pairwise.unsigned.v8i16( + // WEBASSEMBLY-SAME: <16 x i8> %v) + // WEBASSEMBLY-NEXT: ret +} + +i32x4 extadd_pairwise_i16x8_s_i32x4(i16x8 v) { + return __builtin_wasm_extadd_pairwise_i16x8_s_i32x4(v); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.extadd.pairwise.signed.v4i32( + // WEBASSEMBLY-SAME: <8 x i16> %v) + // WEBASSEMBLY-NEXT: ret +} + +u32x4 extadd_pairwise_i16x8_u_i32x4(u16x8 v) { + return __builtin_wasm_extadd_pairwise_i16x8_u_i32x4(v); + // WEBASSEMBLY: call <4 x i32> @llvm.wasm.extadd.pairwise.unsigned.v4i32( + // WEBASSEMBLY-SAME: <8 x i16> %v) + // WEBASSEMBLY-NEXT: ret +} + i32x4 dot_i16x8_s(i16x8 x, i16x8 y) { return __builtin_wasm_dot_s_i32x4_i16x8(x, y); // WEBASSEMBLY: call <4 x i32> @llvm.wasm.dot(<8 x i16> %x, <8 x i16> %y) Index: clang/lib/CodeGen/CGBuiltin.cpp =================================================================== --- clang/lib/CodeGen/CGBuiltin.cpp +++ clang/lib/CodeGen/CGBuiltin.cpp @@ -16885,6 +16885,28 @@ Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType())); return Builder.CreateCall(Callee, {LHS, RHS}); } + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_s_i16x8: + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_u_i16x8: + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_s_i32x4: + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_u_i32x4: { + Value *Vec = EmitScalarExpr(E->getArg(0)); + unsigned IntNo; + switch (BuiltinID) { + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_s_i16x8: + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_s_i32x4: + IntNo = Intrinsic::wasm_extadd_pairwise_signed; + break; + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i8x16_u_i16x8: + case WebAssembly::BI__builtin_wasm_extadd_pairwise_i16x8_u_i32x4: + IntNo = Intrinsic::wasm_extadd_pairwise_unsigned; + break; + default: + llvm_unreachable("unexptected builtin ID"); + } + + Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType())); + return Builder.CreateCall(Callee, Vec); + } case WebAssembly::BI__builtin_wasm_bitselect: { Value *V1 = EmitScalarExpr(E->getArg(0)); Value *V2 = EmitScalarExpr(E->getArg(1)); Index: clang/include/clang/Basic/BuiltinsWebAssembly.def =================================================================== --- clang/include/clang/Basic/BuiltinsWebAssembly.def +++ clang/include/clang/Basic/BuiltinsWebAssembly.def @@ -133,6 +133,12 @@ TARGET_BUILTIN(__builtin_wasm_extmul_low_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_extmul_high_i32x4_u_i64x2, "V2ULLiV4UiV4Ui", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i8x16_s_i16x8, "V8sV16Sc", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i8x16_u_i16x8, "V8UsV16Uc", "nc", "simd128") + +TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_s_i32x4, "V4iV8s", "nc", "simd128") +TARGET_BUILTIN(__builtin_wasm_extadd_pairwise_i16x8_u_i32x4, "V4UiV8Us", "nc", "simd128") + TARGET_BUILTIN(__builtin_wasm_bitselect, "V4iV4iV4iV4i", "nc", "simd128") TARGET_BUILTIN(__builtin_wasm_signselect_i8x16, "V16ScV16ScV16ScV16Sc", "nc", "simd128")
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