achieveartificialintelligence updated this revision to Diff 312395.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D93298/new/
https://reviews.llvm.org/D93298
Files:
llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/lib/Target/RISCV/RISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfo.td
llvm/lib/Target/RISCV/RISCVInstrInfoZfinx.td
llvm/lib/Target/RISCV/RISCVSubtarget.h
llvm/test/MC/RISCV/rv32d-invalid.s
llvm/test/MC/RISCV/rv32zfh-invalid.s
llvm/test/MC/RISCV/rvzfinx-valid.s
Index: llvm/test/MC/RISCV/rvzfinx-valid.s
===================================================================
--- /dev/null
+++ llvm/test/MC/RISCV/rvzfinx-valid.s
@@ -0,0 +1,333 @@
+# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zfinx %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
+# RUN: | FileCheck %s --check-prefix=CHECK-ERROR
+# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zfinx %s \
+# RUN: | llvm-objdump -d --mattr=+experimental-zfinx - \
+# RUN: | FileCheck %s --check-prefix=CHECK-INST
+# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+experimental-zfinx %s \
+# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+fmadd.h a0, a1, a2, a3
+# CHECK-INST: fmadd.h a0, a1, a2, a3
+# CHECK-ENCODING: [0x43,0xf5,0xc5,0x6c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 43 f5 c5 6c <unknown>
+
+fmsub.h a0, a1, a2, a3
+# CHECK-INST: fmsub.h a0, a1, a2, a3
+# CHECK-ENCODING: [0x47,0xf5,0xc5,0x6c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 47 f5 c5 6c <unknown>
+
+fnmsub.h a0, a1, a2, a3
+# CHECK-INST: fnmsub.h a0, a1, a2, a3
+# CHECK-ENCODING: [0x4b,0xf5,0xc5,0x6c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 4b f5 c5 6c <unknown>
+
+fnmadd.h a0, a1, a2, a3
+# CHECK-INST: fnmadd.h a0, a1, a2, a3
+# CHECK-ENCODING: [0x4f,0xf5,0xc5,0x6c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 4f f5 c5 6c <unknown>
+
+fadd.h a0, a1, a2
+# CHECK-INST: fadd.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x04]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 04 <unknown>
+
+fsub.h a0, a1, a2
+# CHECK-INST: fsub.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x0c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 0c <unknown>
+
+fmul.h a0, a1, a2
+# CHECK-INST: fmul.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x14]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 14 <unknown>
+
+fdiv.h a0, a1, a2
+# CHECK-INST: fdiv.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x1c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 1c <unknown>
+
+fsqrt.h a0, a1
+# CHECK-INST: fsqrt.h a0, a1
+# CHECK-ENCODING: [0x53,0xf5,0x05,0x5c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 05 5c <unknown>
+
+fsgnj.h a0, a1, a2
+# CHECK-INST: fsgnj.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0x24]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 24 <unknown>
+
+fsgnjn.h a0, a1, a2
+# CHECK-INST: fsgnjn.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0x24]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 24 <unknown>
+
+fsgnjx.h a0, a1, a2
+# CHECK-INST: fsgnjx.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0xa5,0xc5,0x24]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 a5 c5 24 <unknown>
+
+fmin.h a0, a1, a2
+# CHECK-INST: fmin.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0x2c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 2c <unknown>
+
+fmax.h a0, a1, a2
+# CHECK-INST: fmax.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0x2c]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 2c <unknown>
+
+feq.h a0, a1, a2
+# CHECK-INST: feq.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0xa5,0xc5,0xa4]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 a5 c5 a4 <unknown>
+
+flt.h a0, a1, a2
+# CHECK-INST: flt.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0xa4]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 a4 <unknown>
+
+fle.h a0, a1, a2
+# CHECK-INST: fle.h a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0xa4]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 a4 <unknown>
+
+fclass.h a0, a1
+# CHECK-INST: fclass.h a0, a1
+# CHECK-ENCODING: [0x53,0x95,0x05,0xe4]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 05 e4 <unknown>
+
+fmadd.s a0, a1, a2, a3
+# CHECK-INST: fmadd.s a0, a1, a2, a3
+# CHECK-ENCODING: [0x43,0xf5,0xc5,0x68]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 43 f5 c5 68 <unknown>
+
+fmsub.s a0, a1, a2, a3
+# CHECK-INST: fmsub.s a0, a1, a2, a3
+# CHECK-ENCODING: [0x47,0xf5,0xc5,0x68]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 47 f5 c5 68 <unknown>
+
+fnmsub.s a0, a1, a2, a3
+# CHECK-INST: fnmsub.s a0, a1, a2, a3
+# CHECK-ENCODING: [0x4b,0xf5,0xc5,0x68]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 4b f5 c5 68 <unknown>
+
+fnmadd.s a0, a1, a2, a3
+# CHECK-INST: fnmadd.s a0, a1, a2, a3
+# CHECK-ENCODING: [0x4f,0xf5,0xc5,0x68]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 4f f5 c5 68 <unknown>
+
+fadd.s a0, a1, a2
+# CHECK-INST: fadd.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x00]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 00 <unknown>
+
+fsub.s a0, a1, a2
+# CHECK-INST: fsub.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x08]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 08 <unknown>
+
+fmul.s a0, a1, a2
+# CHECK-INST: fmul.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x10]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 10 <unknown>
+
+fdiv.s a0, a1, a2
+# CHECK-INST: fdiv.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x18]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 18 <unknown>
+
+fsqrt.s a0, a1
+# CHECK-INST: fsqrt.s a0, a1
+# CHECK-ENCODING: [0x53,0xf5,0x05,0x58]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 05 58 <unknown>
+
+fsgnj.s a0, a1, a2
+# CHECK-INST: fsgnj.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0x20]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 20 <unknown>
+
+fsgnjn.s a0, a1, a2
+# CHECK-INST: fsgnjn.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0x20]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 20 <unknown>
+
+fsgnjx.s a0, a1, a2
+# CHECK-INST: fsgnjx.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0xa5,0xc5,0x20]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 a5 c5 20 <unknown>
+
+fmin.s a0, a1, a2
+# CHECK-INST: fmin.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0x28]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 28 <unknown>
+
+fmax.s a0, a1, a2
+# CHECK-INST: fmax.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0x28]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 28 <unknown>
+
+feq.s a0, a1, a2
+# CHECK-INST: feq.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0xa5,0xc5,0xa0]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 a5 c5 a0 <unknown>
+
+flt.s a0, a1, a2
+# CHECK-INST: flt.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0xa0]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 a0 <unknown>
+
+fle.s a0, a1, a2
+# CHECK-INST: fle.s a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0xa0]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 a0 <unknown>
+
+fclass.s a0, a1
+# CHECK-INST: fclass.s a0, a1
+# CHECK-ENCODING: [0x53,0x95,0x05,0xe0]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 05 e0 <unknown>
+
+fmadd.d a0, a1, a2, a3
+# CHECK-INST: fmadd.d a0, a1, a2, a3
+# CHECK-ENCODING: [0x43,0xf5,0xc5,0x6a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 43 f5 c5 6a <unknown>
+
+fmsub.d a0, a1, a2, a3
+# CHECK-INST: fmsub.d a0, a1, a2, a3
+# CHECK-ENCODING: [0x47,0xf5,0xc5,0x6a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 47 f5 c5 6a <unknown>
+
+fnmsub.d a0, a1, a2, a3
+# CHECK-INST: fnmsub.d a0, a1, a2, a3
+# CHECK-ENCODING: [0x4b,0xf5,0xc5,0x6a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 4b f5 c5 6a <unknown>
+
+fnmadd.d a0, a1, a2, a3
+# CHECK-INST: fnmadd.d a0, a1, a2, a3
+# CHECK-ENCODING: [0x4f,0xf5,0xc5,0x6a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 4f f5 c5 6a <unknown>
+
+fadd.d a0, a1, a2
+# CHECK-INST: fadd.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x02]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 02 <unknown>
+
+fsub.d a0, a1, a2
+# CHECK-INST: fsub.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x0a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 0a <unknown>
+
+fmul.d a0, a1, a2
+# CHECK-INST: fmul.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x12]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 12 <unknown>
+
+fdiv.d a0, a1, a2
+# CHECK-INST: fdiv.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0xf5,0xc5,0x1a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 c5 1a <unknown>
+
+fsqrt.d a0, a1
+# CHECK-INST: fsqrt.d a0, a1
+# CHECK-ENCODING: [0x53,0xf5,0x05,0x5a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 f5 05 5a <unknown>
+
+fsgnj.d a0, a1, a2
+# CHECK-INST: fsgnj.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0x22]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 22 <unknown>
+
+fsgnjn.d a0, a1, a2
+# CHECK-INST: fsgnjn.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0x22]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 22 <unknown>
+
+fsgnjx.d a0, a1, a2
+# CHECK-INST: fsgnjx.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0xa5,0xc5,0x22]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 a5 c5 22 <unknown>
+
+fmin.d a0, a1, a2
+# CHECK-INST: fmin.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0x2a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 2a <unknown>
+
+fmax.d a0, a1, a2
+# CHECK-INST: fmax.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0x2a]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 2a <unknown>
+
+feq.d a0, a1, a2
+# CHECK-INST: feq.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0xa5,0xc5,0xa2]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 a5 c5 a2 <unknown>
+
+flt.d a0, a1, a2
+# CHECK-INST: flt.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0x95,0xc5,0xa2]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 c5 a2 <unknown>
+
+fle.d a0, a1, a2
+# CHECK-INST: fle.d a0, a1, a2
+# CHECK-ENCODING: [0x53,0x85,0xc5,0xa2]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 85 c5 a2 <unknown>
+
+fclass.d a0, a1
+# CHECK-INST: fclass.d a0, a1
+# CHECK-ENCODING: [0x53,0x95,0x05,0xe2]
+# CHECK-ERROR: 'Zfinx' (Float in Integer)
+# CHECK-UNKNOWN: 53 95 05 e2 <unknown>
Index: llvm/test/MC/RISCV/rv32zfh-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32zfh-invalid.s
+++ llvm/test/MC/RISCV/rv32zfh-invalid.s
@@ -30,7 +30,7 @@
fnmsub.h f18, f19, f20, f21, 0b111 # CHECK: :[[@LINE]]:30: error: operand must be a valid floating point rounding mode mnemonic
# Integer registers where FP regs are expected
-fadd.h a2, a1, a0 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
+fadd.h a2, a1, a0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfinx' (Float in Integer)
# FP registers where integer regs are expected
fcvt.wu.h ft2, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
Index: llvm/test/MC/RISCV/rv32d-invalid.s
===================================================================
--- llvm/test/MC/RISCV/rv32d-invalid.s
+++ llvm/test/MC/RISCV/rv32d-invalid.s
@@ -15,7 +15,7 @@
fsgnjn.d fa100, fa2, fa3 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction
# Integer registers where FP regs are expected
-fadd.d a2, a1, a0 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction
+fadd.d a2, a1, a0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'Zfinx' (Float in Integer)
# FP registers where integer regs are expected
fcvt.wu.d ft2, a1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
Index: llvm/lib/Target/RISCV/RISCVSubtarget.h
===================================================================
--- llvm/lib/Target/RISCV/RISCVSubtarget.h
+++ llvm/lib/Target/RISCV/RISCVSubtarget.h
@@ -54,6 +54,7 @@
bool HasStdExtZvlsseg = false;
bool HasStdExtZvamo = false;
bool HasStdExtZfh = false;
+ bool HasStdExtZfinx = false;
bool HasRV64 = false;
bool IsRV32E = false;
bool EnableLinkerRelax = false;
@@ -120,6 +121,7 @@
bool hasStdExtZvlsseg() const { return HasStdExtZvlsseg; }
bool hasStdExtZvamo() const { return HasStdExtZvamo; }
bool hasStdExtZfh() const { return HasStdExtZfh; }
+ bool hasStdExtZfinx() const { return HasStdExtZfinx; }
bool is64Bit() const { return HasRV64; }
bool isRV32E() const { return IsRV32E; }
bool enableLinkerRelax() const { return EnableLinkerRelax; }
Index: llvm/lib/Target/RISCV/RISCVInstrInfoZfinx.td
===================================================================
--- /dev/null
+++ llvm/lib/Target/RISCV/RISCVInstrInfoZfinx.td
@@ -0,0 +1,225 @@
+//=== RISCVInstrInfoZfinx.td - RISC-V 'Zfinx' instructions -*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file describes the RISC-V instructions from the standard 'Zfinx'
+// float in integer.
+// This version is still experimental as the 'Zfinx' extension hasn't been
+// ratified yet.
+//
+//===----------------------------------------------------------------------===//
+
+//===----------------------------------------------------------------------===//
+// Instruction class templates
+//===----------------------------------------------------------------------===//
+
+let Predicates = [HasStdExtZfinx] in {
+let DecoderNamespace = "RVZfinx",
+ hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
+
+// Common
+class Zfinx_FPUnaryOp_r<bits<7> funct7, bits<3> funct3, string opcodestr>
+ : RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd), (ins GPR:$rs1),
+ opcodestr, "$rd, $rs1">;
+
+class Zfinx_FPUnaryOp_r_frm<bits<7> funct7, string opcodestr>
+ : RVInstRFrm<funct7, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, frmarg:$funct3), opcodestr,
+ "$rd, $rs1, $funct3">;
+
+// Zfh Part
+class Zfinx_FPFMAH_rrr_frm<RISCVOpcode opcode, string opcodestr>
+ : RVInstR4<0b10, opcode, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2, GPR:$rs3, frmarg:$funct3),
+ opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
+
+class Zfinx_FPALUH_rr_frm<bits<7> funct7, string opcodestr>
+ : RVInstRFrm<funct7, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2, frmarg:$funct3), opcodestr,
+ "$rd, $rs1, $rs2, $funct3">;
+
+class Zfinx_FPALUH_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
+ : RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">;
+
+class Zfinx_FPCmpH_rr<bits<3> funct3, string opcodestr>
+ : RVInstR<0b1010010, funct3, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">,
+ Sched<[]>;
+
+// F Part
+class Zfinx_FPFMAS_rrr_frm<RISCVOpcode opcode, string opcodestr>
+ : RVInstR4<0b00, opcode, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2, GPR:$rs3, frmarg:$funct3),
+ opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
+
+class Zfinx_FPALUS_rr_frm<bits<7> funct7, string opcodestr>
+ : RVInstRFrm<funct7, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2, frmarg:$funct3), opcodestr,
+ "$rd, $rs1, $rs2, $funct3">;
+
+class Zfinx_FPALUS_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
+ : RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">;
+
+class Zfinx_FPCmpS_rr<bits<3> funct3, string opcodestr>
+ : RVInstR<0b1010000, funct3, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">,
+ Sched<[WriteFCmp32, ReadFCmp32, ReadFCmp32]>;
+
+// D Part
+class Zfinx_FPFMAD_rrr_frm<RISCVOpcode opcode, string opcodestr>
+ : RVInstR4<0b01, opcode, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2, GPR:$rs3, frmarg:$funct3),
+ opcodestr, "$rd, $rs1, $rs2, $rs3, $funct3">;
+
+class Zfinx_FPALUD_rr_frm<bits<7> funct7, string opcodestr>
+ : RVInstRFrm<funct7, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2, frmarg:$funct3), opcodestr,
+ "$rd, $rs1, $rs2, $funct3">;
+
+class Zfinx_FPALUD_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
+ : RVInstR<funct7, funct3, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">;
+
+class Zfinx_FPCmpD_rr<bits<3> funct3, string opcodestr>
+ : RVInstR<0b1010001, funct3, OPC_OP_FP, (outs GPR:$rd),
+ (ins GPR:$rs1, GPR:$rs2), opcodestr, "$rd, $rs1, $rs2">,
+ Sched<[WriteFCmp64, ReadFCmp64, ReadFCmp64]>;
+} // DecoderNamespace = "RVZfinx", hasSideEffects = 0, mayLoad = 0, mayStore = 0
+
+//===----------------------------------------------------------------------===//
+// Instruction class templates alias
+//===----------------------------------------------------------------------===//
+
+// Zfh Part
+class Zfinx_FPFMAHDynFrmAlias<Zfinx_FPFMAH_rrr_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, GPR:$rs3, 0b111)>;
+
+class Zfinx_FPALUHDynFrmAlias<Zfinx_FPALUH_rr_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, 0b111)>;
+
+// F Part
+class Zfinx_FPFMASDynFrmAlias<Zfinx_FPFMAS_rrr_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, GPR:$rs3, 0b111)>;
+
+class Zfinx_FPALUSDynFrmAlias<Zfinx_FPALUS_rr_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, 0b111)>;
+class Zfinx_FPUnaryOpDynFrmAlias<Zfinx_FPUnaryOp_r_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1",
+ (Inst GPR:$rd, GPR:$rs1, 0b111)>;
+
+// D Part
+class Zfinx_FPFMADDynFrmAlias<Zfinx_FPFMAD_rrr_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2, $rs3",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, GPR:$rs3, 0b111)>;
+
+class Zfinx_FPALUDDynFrmAlias<Zfinx_FPALUD_rr_frm Inst, string OpcodeStr>
+ : InstAlias<OpcodeStr#" $rd, $rs1, $rs2",
+ (Inst GPR:$rd, GPR:$rs1, GPR:$rs2, 0b111)>;
+
+//===----------------------------------------------------------------------===//
+// Instructions
+//===----------------------------------------------------------------------===//
+
+multiclass Zfinx_FPFMAH<RISCVOpcode opcode, string opcodestr>{
+ def _H : Zfinx_FPFMAH_rrr_frm<opcode, opcodestr#".h">, Sched<[]>;
+ def _S : Zfinx_FPFMAS_rrr_frm<opcode, opcodestr#".s">, Sched<[]>;
+ def _D : Zfinx_FPFMAD_rrr_frm<opcode, opcodestr#".d">, Sched<[]>;
+}
+
+defm Zfinx_FMADD : Zfinx_FPFMAH<OPC_MADD, "fmadd">;
+def : Zfinx_FPFMAHDynFrmAlias<Zfinx_FMADD_H, "fmadd.h">;
+def : Zfinx_FPFMASDynFrmAlias<Zfinx_FMADD_S, "fmadd.s">;
+def : Zfinx_FPFMADDynFrmAlias<Zfinx_FMADD_D, "fmadd.d">;
+defm Zfinx_FMSUB : Zfinx_FPFMAH<OPC_MSUB, "fmsub">;
+def : Zfinx_FPFMAHDynFrmAlias<Zfinx_FMSUB_H, "fmsub.h">;
+def : Zfinx_FPFMASDynFrmAlias<Zfinx_FMSUB_S, "fmsub.s">;
+def : Zfinx_FPFMADDynFrmAlias<Zfinx_FMSUB_D, "fmsub.d">;
+defm Zfinx_FNMSUB : Zfinx_FPFMAH<OPC_NMSUB, "fnmsub">;
+def : Zfinx_FPFMAHDynFrmAlias<Zfinx_FNMSUB_H, "fnmsub.h">;
+def : Zfinx_FPFMASDynFrmAlias<Zfinx_FNMSUB_S, "fnmsub.s">;
+def : Zfinx_FPFMADDynFrmAlias<Zfinx_FNMSUB_D, "fnmsub.d">;
+defm Zfinx_FNMADD : Zfinx_FPFMAH<OPC_NMADD, "fnmadd">;
+def : Zfinx_FPFMAHDynFrmAlias<Zfinx_FNMADD_H, "fnmadd.h">;
+def : Zfinx_FPFMASDynFrmAlias<Zfinx_FNMADD_S, "fnmadd.s">;
+def : Zfinx_FPFMADDynFrmAlias<Zfinx_FNMADD_D, "fnmadd.d">;
+
+multiclass Zfinx_FPALU_frm<bits<7> funct7, string opcodestr> {
+ def _H : Zfinx_FPALUH_rr_frm<!add(funct7,0b10), "fadd.h">, Sched<[]>;
+ def _S : Zfinx_FPALUS_rr_frm<!add(funct7,0b00), "fadd.s">, Sched<[]>;
+ def _D : Zfinx_FPALUD_rr_frm<!add(funct7,0b01), "fadd.d">, Sched<[]>;
+}
+defm Zfinx_FADD : Zfinx_FPALU_frm<0b0000000, "fadd">;
+def : Zfinx_FPALUHDynFrmAlias<Zfinx_FADD_H, "fadd.h">;
+def : Zfinx_FPALUSDynFrmAlias<Zfinx_FADD_S, "fadd.s">;
+def : Zfinx_FPALUDDynFrmAlias<Zfinx_FADD_D, "fadd.d">;
+defm Zfinx_FSUB : Zfinx_FPALU_frm<0b0000100, "fsub">;
+def : Zfinx_FPALUHDynFrmAlias<Zfinx_FSUB_H, "fsub.h">;
+def : Zfinx_FPALUSDynFrmAlias<Zfinx_FSUB_S, "fsub.s">;
+def : Zfinx_FPALUDDynFrmAlias<Zfinx_FSUB_D, "fsub.d">;
+defm Zfinx_FMUL : Zfinx_FPALU_frm<0b0001000, "fmul">;
+def : Zfinx_FPALUHDynFrmAlias<Zfinx_FMUL_H, "fmul.h">;
+def : Zfinx_FPALUSDynFrmAlias<Zfinx_FMUL_S, "fmul.s">;
+def : Zfinx_FPALUDDynFrmAlias<Zfinx_FMUL_D, "fmul.d">;
+defm Zfinx_FDIV : Zfinx_FPALU_frm<0b0001100, "fdiv">;
+def : Zfinx_FPALUHDynFrmAlias<Zfinx_FDIV_H, "fdiv.h">;
+def : Zfinx_FPALUSDynFrmAlias<Zfinx_FDIV_S, "fdiv.s">;
+def : Zfinx_FPALUDDynFrmAlias<Zfinx_FDIV_D, "fdiv.d">;
+
+multiclass Zfinx_FPUnaryOp_frm<string opcodestr> {
+ let rs2 = 0b00000 in {
+ def _H : Zfinx_FPUnaryOp_r_frm<0b0101110, opcodestr#".h">, Sched<[]>;
+ def _S : Zfinx_FPUnaryOp_r_frm<0b0101100, opcodestr#".s">, Sched<[]>;
+ def _D : Zfinx_FPUnaryOp_r_frm<0b0101101, opcodestr#".d">, Sched<[]>;
+ }
+}
+defm Zfinx_FSQRT : Zfinx_FPUnaryOp_frm<"fsqrt">;
+def : Zfinx_FPUnaryOpDynFrmAlias<Zfinx_FSQRT_H, "fsqrt.h">;
+def : Zfinx_FPUnaryOpDynFrmAlias<Zfinx_FSQRT_S, "fsqrt.s">;
+def : Zfinx_FPUnaryOpDynFrmAlias<Zfinx_FSQRT_D, "fsqrt.d">;
+
+multiclass Zfinx_FPALU<bits<7> funct7, bits<3> funct3, string opcodestr> {
+ def _H : Zfinx_FPALUH_rr<!add(funct7,0b10), funct3, opcodestr#".h">,
+ Sched<[]>;
+ def _S : Zfinx_FPALUS_rr<!add(funct7,0b00), funct3, opcodestr#".s">,
+ Sched<[]>;
+ def _D : Zfinx_FPALUD_rr<!add(funct7,0b01), funct3, opcodestr#".d">,
+ Sched<[]>;
+}
+defm Zfinx_FSGNJ : Zfinx_FPALU<0b0010000, 0b000, "fsgnj">;
+defm Zfinx_FSGNJN : Zfinx_FPALU<0b0010000, 0b001, "fsgnjn">;
+defm Zfinx_FSGNJX : Zfinx_FPALU<0b0010000, 0b010, "fsgnjx">;
+defm Zfinx_FMIN : Zfinx_FPALU<0b0010100, 0b000, "fmin">;
+defm Zfinx_FMAX : Zfinx_FPALU<0b0010100, 0b001, "fmax">;
+
+multiclass Zfinx_FPCmp<bits<3> funct3, string opcodestr>{
+ def _H : Zfinx_FPCmpH_rr<funct3, opcodestr#".h">;
+ def _S : Zfinx_FPCmpS_rr<funct3, opcodestr#".s">;
+ def _D : Zfinx_FPCmpD_rr<funct3, opcodestr#".d">;
+}
+defm Zfinx_FEQ : Zfinx_FPCmp<0b010, "feq">;
+defm Zfinx_FLT : Zfinx_FPCmp<0b001, "flt">;
+defm Zfinx_FLE : Zfinx_FPCmp<0b000, "fle">;
+
+multiclass Zfinx_FPUnOp<bits<7> funct7, string opcodestr>{
+ let rs2 = 0b00000 in {
+ def _H : Zfinx_FPUnaryOp_r<!add(funct7,0b10), 0b001, opcodestr#".h">,
+ Sched<[]>;
+ def _S : Zfinx_FPUnaryOp_r<!add(funct7,0b00), 0b001, opcodestr#".s">,
+ Sched<[]>;
+ def _D : Zfinx_FPUnaryOp_r<!add(funct7,0b01), 0b001, opcodestr#".d">,
+ Sched<[]>;
+ }
+}
+defm Zfinx_FCLASS : Zfinx_FPUnOp<0b1110000, "fclass">;
+
+} // Predicates = [HasStdExtZfinx]
Index: llvm/lib/Target/RISCV/RISCVInstrInfo.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -1224,3 +1224,4 @@
include "RISCVInstrInfoB.td"
include "RISCVInstrInfoV.td"
include "RISCVInstrInfoZfh.td"
+include "RISCVInstrInfoZfinx.td"
Index: llvm/lib/Target/RISCV/RISCV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCV.td
+++ llvm/lib/Target/RISCV/RISCV.td
@@ -49,6 +49,13 @@
AssemblerPredicate<(all_of FeatureExtZfh),
"'Zfh' (Half-Precision Floating-Point)">;
+def FeatureExtZfinx
+ : SubtargetFeature<"experimental-zfinx", "HasStdExtZfinx", "true",
+ "'Zfinx' (Float in Integer)">;
+def HasStdExtZfinx : Predicate<"Subtarget->hasStdExtZfinx()">,
+ AssemblerPredicate<(all_of FeatureExtZfinx),
+ "'Zfinx' (Float in Integer)">;
+
def FeatureStdExtC
: SubtargetFeature<"c", "HasStdExtC", "true",
"'C' (Compressed Instructions)">;
Index: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
===================================================================
--- llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -367,6 +367,18 @@
return MCDisassembler::Fail;
}
Insn = support::endian::read32le(Bytes.data());
+
+ if (STI.getFeatureBits()[RISCV::FeatureExtZfinx]) {
+ LLVM_DEBUG(dbgs() << "Trying RVZfinx table (Float in Integer):\n");
+ // Calling the auto-generated decoder function.
+ Result = decodeInstruction(DecoderTableRVZfinx32, MI, Insn, Address, this,
+ STI);
+ if (Result != MCDisassembler::Fail) {
+ Size = 4;
+ return Result;
+ }
+ }
+
LLVM_DEBUG(dbgs() << "Trying RISCV32 table :\n");
Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
Size = 4;
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