This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1d5daed1997d: [Matrix] Update mangling to use paramterized
vendor ext type syntax. (authored by fhahn).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D91253/new/
https://reviews.llvm.org/D91253
Files:
clang/lib/AST/ItaniumMangle.cpp
clang/test/CodeGenCXX/matrix-type-builtins.cpp
clang/test/CodeGenCXX/matrix-type-operators.cpp
clang/test/CodeGenCXX/matrix-type.cpp
Index: clang/test/CodeGenCXX/matrix-type.cpp
===================================================================
--- clang/test/CodeGenCXX/matrix-type.cpp
+++ clang/test/CodeGenCXX/matrix-type.cpp
@@ -6,7 +6,7 @@
// CHECK: %struct.Matrix = type { i8, [12 x float], float }
void load_store(dx5x5_t *a, dx5x5_t *b) {
- // CHECK-LABEL: define void @_Z10load_storePU11matrix_typeLm5ELm5EdS0_(
+ // CHECK-LABEL: define void @_Z10load_storePu11matrix_typeILm5ELm5EdES0_(
// CHECK-NEXT: entry:
// CHECK-NEXT: %a.addr = alloca [25 x double]*, align 8
// CHECK-NEXT: %b.addr = alloca [25 x double]*, align 8
@@ -26,7 +26,7 @@
typedef float fx3x3_t __attribute__((matrix_type(3, 3)));
void parameter_passing(fx3x3_t a, fx3x3_t *b) {
- // CHECK-LABEL: define void @_Z17parameter_passingU11matrix_typeLm3ELm3EfPS_(
+ // CHECK-LABEL: define void @_Z17parameter_passingu11matrix_typeILm3ELm3EfEPS_(
// CHECK-NEXT: entry:
// CHECK-NEXT: %a.addr = alloca [9 x float], align 4
// CHECK-NEXT: %b.addr = alloca [9 x float]*, align 8
@@ -42,7 +42,7 @@
}
fx3x3_t return_matrix(fx3x3_t *a) {
- // CHECK-LABEL: define <9 x float> @_Z13return_matrixPU11matrix_typeLm3ELm3Ef(
+ // CHECK-LABEL: define <9 x float> @_Z13return_matrixPu11matrix_typeILm3ELm3EfE(
// CHECK-NEXT: entry:
// CHECK-NEXT: %a.addr = alloca [9 x float]*, align 8
// CHECK-NEXT: store [9 x float]* %a, [9 x float]** %a.addr, align 8
@@ -215,42 +215,42 @@
// CHECK-NEXT: %m4 = alloca [144 x float], align 4
// CHECK-NEXT: %v = alloca %struct.selector.3, align 1
// CHECK-NEXT: %undef.agg.tmp4 = alloca %struct.selector.3, align 1
- // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi3EERU11matrix_typeXLm10EEXT0_ET_([120 x i32]* nonnull align 4 dereferenceable(480) %m0)
- // CHECK-NEXT: call void @_Z10use_matrixIiE8selectorILi2EERU11matrix_typeLm10ELm10ET_([100 x i32]* nonnull align 4 dereferenceable(400) %m1)
- // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi1EERU11matrix_typeXT0_EXLm10EET_([120 x i32]* nonnull align 4 dereferenceable(480) %m2)
- // CHECK-NEXT: call void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERU11matrix_typeXT0_EXT1_ET_([144 x i32]* nonnull align 4 dereferenceable(576) %m3)
- // CHECK-NEXT: call void @_Z10use_matrixILm12ELm12EE8selectorILi4EERU11matrix_typeXT_EXT0_Ef([144 x float]* nonnull align 4 dereferenceable(576) %m4)
+ // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi3EERu11matrix_typeIXLm10EEXT0_ET_E([120 x i32]* nonnull align 4 dereferenceable(480) %m0)
+ // CHECK-NEXT: call void @_Z10use_matrixIiE8selectorILi2EERu11matrix_typeILm10ELm10ET_E([100 x i32]* nonnull align 4 dereferenceable(400) %m1)
+ // CHECK-NEXT: call void @_Z10use_matrixIiLm12EE8selectorILi1EERu11matrix_typeIXT0_EXLm10EET_E([120 x i32]* nonnull align 4 dereferenceable(480) %m2)
+ // CHECK-NEXT: call void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERu11matrix_typeIXT0_EXT1_ET_E([144 x i32]* nonnull align 4 dereferenceable(576) %m3)
+ // CHECK-NEXT: call void @_Z10use_matrixILm12ELm12EE8selectorILi4EERu11matrix_typeIXT_EXT0_EfE([144 x float]* nonnull align 4 dereferenceable(576) %m4)
// CHECK-NEXT: ret void
- // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi3EERU11matrix_typeXLm10EEXT0_ET_([120 x i32]* nonnull align 4 dereferenceable(480) %m)
+ // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi3EERu11matrix_typeIXLm10EEXT0_ET_E([120 x i32]* nonnull align 4 dereferenceable(480) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [120 x i32]*, align 8
// CHECK-NEXT: store [120 x i32]* %m, [120 x i32]** %m.addr, align 8
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiE8selectorILi2EERU11matrix_typeLm10ELm10ET_([100 x i32]* nonnull align 4 dereferenceable(400) %m)
+ // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiE8selectorILi2EERu11matrix_typeILm10ELm10ET_E([100 x i32]* nonnull align 4 dereferenceable(400) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [100 x i32]*, align 8
// CHECK-NEXT: store [100 x i32]* %m, [100 x i32]** %m.addr, align 8
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi1EERU11matrix_typeXT0_EXLm10EET_([120 x i32]* nonnull align 4 dereferenceable(480) %m)
+ // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12EE8selectorILi1EERu11matrix_typeIXT0_EXLm10EET_E([120 x i32]* nonnull align 4 dereferenceable(480) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [120 x i32]*, align 8
// CHECK-NEXT: store [120 x i32]* %m, [120 x i32]** %m.addr, align 8
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERU11matrix_typeXT0_EXT1_ET_([144 x i32]* nonnull align 4 dereferenceable(576) %m)
+ // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixIiLm12ELm12EE8selectorILi0EERu11matrix_typeIXT0_EXT1_ET_E([144 x i32]* nonnull align 4 dereferenceable(576) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [144 x i32]*, align 8
// CHECK-NEXT: store [144 x i32]* %m, [144 x i32]** %m.addr, align 8
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixILm12ELm12EE8selectorILi4EERU11matrix_typeXT_EXT0_Ef([144 x float]* nonnull align 4 dereferenceable(576)
+ // CHECK-LABEL: define linkonce_odr void @_Z10use_matrixILm12ELm12EE8selectorILi4EERu11matrix_typeIXT_EXT0_EfE([144 x float]* nonnull align 4 dereferenceable(576)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [144 x float]*, align 8
// CHECK-NEXT: store [144 x float]* %m, [144 x float]** %m.addr, align 8
@@ -277,10 +277,10 @@
// CHECK-LABEL: define void @_Z11test_auto_tv()
// CHECK-NEXT: entry:
// CHECK-NEXT: %m = alloca [130 x i32], align 4
- // CHECK-NEXT: call void @_Z3fooILm13EEvRU11matrix_typeXT_EXLm10EEi([130 x i32]* nonnull align 4 dereferenceable(520) %m)
+ // CHECK-NEXT: call void @_Z3fooILm13EEvRu11matrix_typeIXT_EXLm10EEiE([130 x i32]* nonnull align 4 dereferenceable(520) %m)
// CHECK-NEXT: ret void
- // CHECK-LABEL: define linkonce_odr void @_Z3fooILm13EEvRU11matrix_typeXT_EXLm10EEi([130 x i32]* nonnull align 4 dereferenceable(520) %m)
+ // CHECK-LABEL: define linkonce_odr void @_Z3fooILm13EEvRu11matrix_typeIXT_EXLm10EEiE([130 x i32]* nonnull align 4 dereferenceable(520) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [130 x i32]*, align 8
// CHECK-NEXT: store [130 x i32]* %m, [130 x i32]** %m.addr, align 8
@@ -321,25 +321,25 @@
// CHECK-NEXT: %r4 = alloca [20 x float], align 4
// CHECK-NEXT: %r5 = alloca %struct.selector.0, align 1
// CHECK-NEXT: %undef.agg.tmp3 = alloca %struct.selector.0, align 1
- // CHECK-NEXT: %call = call <40 x float> @_Z12use_matrix_2ILm4ELm6EEU11matrix_typeXplT_Li1EEXplT0_Li2EEfRU11matrix_typeXT_EXT0_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m1)
+ // CHECK-NEXT: %call = call <40 x float> @_Z12use_matrix_2ILm4ELm6EEu11matrix_typeIXplT_Li1EEXplT0_Li2EEfERu11matrix_typeIXT_EXT0_EiE([24 x i32]* nonnull align 4 dereferenceable(96) %m1)
// CHECK-NEXT: %0 = bitcast [40 x float]* %r1 to <40 x float>*
// CHECK-NEXT: store <40 x float> %call, <40 x float>* %0, align 4
- // CHECK-NEXT: call void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERU11matrix_typeXplT_Li2EEXdvT0_Li2EEiRU11matrix_typeXT_EXT0_Ef([24 x i32]* nonnull align 4 dereferenceable(96) %m1, [24 x float]* nonnull align 4 dereferenceable(96) %m2)
- // CHECK-NEXT: call void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERU11matrix_typeXplT_T0_EXT0_EiRU11matrix_typeXT_EXmiT0_T_Ef([104 x i32]* nonnull align 4 dereferenceable(416) %m3, [15 x float]* nonnull align 4 dereferenceable(60) %m4)
- // CHECK-NEXT: %call2 = call <20 x float> @_Z12use_matrix_2ILm5EEU11matrix_typeXplT_T_EXmiT_Li3EEfRU11matrix_typeXT_EXLm10EEi([50 x i32]* nonnull align 4 dereferenceable(200) %m5)
+ // CHECK-NEXT: call void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERu11matrix_typeIXplT_Li2EEXdvT0_Li2EEiERu11matrix_typeIXT_EXT0_EfE([24 x i32]* nonnull align 4 dereferenceable(96) %m1, [24 x float]* nonnull align 4 dereferenceable(96) %m2)
+ // CHECK-NEXT: call void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERu11matrix_typeIXplT_T0_EXT0_EiERu11matrix_typeIXT_EXmiT0_T_EfE([104 x i32]* nonnull align 4 dereferenceable(416) %m3, [15 x float]* nonnull align 4 dereferenceable(60) %m4)
+ // CHECK-NEXT: %call2 = call <20 x float> @_Z12use_matrix_2ILm5EEu11matrix_typeIXplT_T_EXmiT_Li3EEfERu11matrix_typeIXT_EXLm10EEiE([50 x i32]* nonnull align 4 dereferenceable(200) %m5)
// CHECK-NEXT: %1 = bitcast [20 x float]* %r4 to <20 x float>*
// CHECK-NEXT: store <20 x float> %call2, <20 x float>* %1, align 4
- // CHECK-NEXT: call void @_Z12use_matrix_3ILm6EE8selectorILi2EERU11matrix_typeXmiT_Li2EEXT_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m1)
+ // CHECK-NEXT: call void @_Z12use_matrix_3ILm6EE8selectorILi2EERu11matrix_typeIXmiT_Li2EEXT_EiE([24 x i32]* nonnull align 4 dereferenceable(96) %m1)
// CHECK-NEXT: ret void
- // CHECK-LABEL: define linkonce_odr <40 x float> @_Z12use_matrix_2ILm4ELm6EEU11matrix_typeXplT_Li1EEXplT0_Li2EEfRU11matrix_typeXT_EXT0_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m)
+ // CHECK-LABEL: define linkonce_odr <40 x float> @_Z12use_matrix_2ILm4ELm6EEu11matrix_typeIXplT_Li1EEXplT0_Li2EEfERu11matrix_typeIXT_EXT0_EiE([24 x i32]* nonnull align 4 dereferenceable(96) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [24 x i32]*, align 8
// CHECK-NEXT: store [24 x i32]* %m, [24 x i32]** %m.addr, align 8
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERU11matrix_typeXplT_Li2EEXdvT0_Li2EEiRU11matrix_typeXT_EXT0_Ef([24 x i32]* nonnull align 4 dereferenceable(96) %m1, [24 x float]* nonnull align 4 dereferenceable(96) %m2)
+ // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm2ELm12EE8selectorILi0EERu11matrix_typeIXplT_Li2EEXdvT0_Li2EEiERu11matrix_typeIXT_EXT0_EfE([24 x i32]* nonnull align 4 dereferenceable(96) %m1, [24 x float]* nonnull align 4 dereferenceable(96) %m2)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m1.addr = alloca [24 x i32]*, align 8
// CHECK-NEXT: %m2.addr = alloca [24 x float]*, align 8
@@ -348,7 +348,7 @@
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERU11matrix_typeXplT_T0_EXT0_EiRU11matrix_typeXT_EXmiT0_T_Ef([104 x i32]* nonnull align 4 dereferenceable(416) %m1, [15 x float]* nonnull align 4 dereferenceable(60) %m2)
+ // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_2ILm5ELm8EE8selectorILi1EERu11matrix_typeIXplT_T0_EXT0_EiERu11matrix_typeIXT_EXmiT0_T_EfE([104 x i32]* nonnull align 4 dereferenceable(416) %m1, [15 x float]* nonnull align 4 dereferenceable(60) %m2)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m1.addr = alloca [104 x i32]*, align 8
// CHECK-NEXT: %m2.addr = alloca [15 x float]*, align 8
@@ -357,14 +357,14 @@
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr <20 x float> @_Z12use_matrix_2ILm5EEU11matrix_typeXplT_T_EXmiT_Li3EEfRU11matrix_typeXT_EXLm10EEi([50 x i32]* nonnull align 4 dereferenceable(200) %m1)
+ // CHECK-LABEL: define linkonce_odr <20 x float> @_Z12use_matrix_2ILm5EEu11matrix_typeIXplT_T_EXmiT_Li3EEfERu11matrix_typeIXT_EXLm10EEiE([50 x i32]* nonnull align 4 dereferenceable(200) %m1)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m1.addr = alloca [50 x i32]*, align 8
// CHECK-NEXT: store [50 x i32]* %m1, [50 x i32]** %m1.addr, align 8
// CHECK-NEXT: call void @llvm.trap()
// CHECK-NEXT: unreachable
- // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_3ILm6EE8selectorILi2EERU11matrix_typeXmiT_Li2EEXT_Ei([24 x i32]* nonnull align 4 dereferenceable(96) %m)
+ // CHECK-LABEL: define linkonce_odr void @_Z12use_matrix_3ILm6EE8selectorILi2EERu11matrix_typeIXmiT_Li2EEXT_EiE([24 x i32]* nonnull align 4 dereferenceable(96) %m)
// CHECK-NEXT: entry:
// CHECK-NEXT: %m.addr = alloca [24 x i32]*, align 8
// CHECK-NEXT: store [24 x i32]* %m, [24 x i32]** %m.addr, align 8
Index: clang/test/CodeGenCXX/matrix-type-operators.cpp
===================================================================
--- clang/test/CodeGenCXX/matrix-type-operators.cpp
+++ clang/test/CodeGenCXX/matrix-type-operators.cpp
@@ -276,9 +276,9 @@
auto matrix_subscript(double4x4 m, R r, C c) -> decltype(m[r][c]) {}
double test_matrix_subscript(double4x4 m) {
- // CHECK-LABEL: @_Z21test_matrix_subscriptU11matrix_typeLm4ELm4Ed(
+ // CHECK-LABEL: @_Z21test_matrix_subscriptu11matrix_typeILm4ELm4EdE(
// CHECK: [[MAT:%.*]] = load <16 x double>, <16 x double>* {{.*}}, align 8
- // CHECK-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(8) double* @_Z16matrix_subscriptIiiEDTixixfp_fp0_fp1_EU11matrix_typeLm4ELm4EdT_T0_(<16 x double> [[MAT]], i32 1, i32 2)
+ // CHECK-NEXT: [[CALL:%.*]] = call nonnull align 8 dereferenceable(8) double* @_Z16matrix_subscriptIiiEDTixixfp_fp0_fp1_Eu11matrix_typeILm4ELm4EdET_T0_(<16 x double> [[MAT]], i32 1, i32 2)
// CHECK-NEXT: [[RES:%.*]] = load double, double* [[CALL]], align 8
// CHECK-NEXT: ret double [[RES]]
@@ -286,7 +286,7 @@
}
const double &test_matrix_subscript_reference(const double4x4 m) {
- // CHECK-LABEL: @_Z31test_matrix_subscript_referenceU11matrix_typeLm4ELm4Ed(
+ // CHECK-LABEL: @_Z31test_matrix_subscript_referenceu11matrix_typeILm4ELm4EdE(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[M_ADDR:%.*]] = alloca [16 x double], align 8
// CHECK-NEXT: [[REF_TMP:%.*]] = alloca double, align 8
@@ -308,7 +308,7 @@
};
double extract_IntWrapper_idx(double4x4 &m, IntWrapper i, UnsignedWrapper j) {
- // CHECK-LABEL: define double @_Z22extract_IntWrapper_idxRU11matrix_typeLm4ELm4Ed10IntWrapper15UnsignedWrapper(
+ // CHECK-LABEL: define double @_Z22extract_IntWrapper_idxRu11matrix_typeILm4ELm4EdE10IntWrapper15UnsignedWrapper(
// CHECK: [[I:%.*]] = call i32 @_ZN10IntWrappercviEv(%struct.IntWrapper* %i)
// CHECK-NEXT: [[I_ADD:%.*]] = add nsw i32 [[I]], 1
// CHECK-NEXT: [[I_ADD_EXT:%.*]] = sext i32 [[I_ADD]] to i64
@@ -340,16 +340,16 @@
constexpr identmatrix_t identmatrix;
void test_constexpr1(matrix_type<float, 4, 4> &m) {
- // CHECK-LABEL: define void @_Z15test_constexpr1RU11matrix_typeLm4ELm4Ef(
+ // CHECK-LABEL: define void @_Z15test_constexpr1Ru11matrix_typeILm4ELm4EfE(
// CHECK: [[MAT:%.*]] = load <16 x float>, <16 x float>* {{.*}}, align 4
- // CHECK-NEXT: [[IM:%.*]] = call <16 x float> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IfLj4EEEv(%struct.identmatrix_t* @_ZL11identmatrix)
+ // CHECK-NEXT: [[IM:%.*]] = call <16 x float> @_ZNK13identmatrix_tcvu11matrix_typeIXT0_EXT0_ET_EIfLj4EEEv(%struct.identmatrix_t* @_ZL11identmatrix)
// CHECK-NEXT: [[ADD:%.*]] = fadd <16 x float> [[MAT]], [[IM]]
// CHECK-NEXT: [[MAT_ADDR:%.*]] = load [16 x float]*, [16 x float]** %m.addr, align 8
// CHECK-NEXT: [[MAT_ADDR2:%.*]] = bitcast [16 x float]* [[MAT_ADDR]] to <16 x float>*
// CHECK-NEXT: store <16 x float> [[ADD]], <16 x float>* [[MAT_ADDR2]], align 4
// CHECK-NEXT: ret voi
- // CHECK-LABEL: define linkonce_odr <16 x float> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IfLj4EEEv(
+ // CHECK-LABEL: define linkonce_odr <16 x float> @_ZNK13identmatrix_tcvu11matrix_typeIXT0_EXT0_ET_EIfLj4EEEv(
// CHECK-LABEL: for.body: ; preds = %for.cond
// CHECK-NEXT: [[I:%.*]] = load i32, i32* %i, align 4
// CHECK-NEXT: [[I_EXT:%.*]] = zext i32 [[I]] to i64
@@ -366,8 +366,8 @@
}
void test_constexpr2(matrix_type<int, 5, 5> &m) {
- // CHECK-LABEL: define void @_Z15test_constexpr2RU11matrix_typeLm5ELm5Ei(
- // CHECK: [[IM:%.*]] = call <25 x i32> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IiLj5EEEv(%struct.identmatrix_t* @_ZL11identmatrix)
+ // CHECK-LABEL: define void @_Z15test_constexpr2Ru11matrix_typeILm5ELm5EiE(
+ // CHECK: [[IM:%.*]] = call <25 x i32> @_ZNK13identmatrix_tcvu11matrix_typeIXT0_EXT0_ET_EIiLj5EEEv(%struct.identmatrix_t* @_ZL11identmatrix)
// CHECK: [[MAT:%.*]] = load <25 x i32>, <25 x i32>* {{.*}}, align 4
// CHECK-NEXT: [[SUB:%.*]] = sub <25 x i32> [[IM]], [[MAT]]
// CHECK-NEXT: [[SUB2:%.*]] = add <25 x i32> [[SUB]], <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
@@ -377,7 +377,7 @@
// CHECK-NEXT: ret void
//
- // CHECK-LABEL: define linkonce_odr <25 x i32> @_ZNK13identmatrix_tcvU11matrix_typeXT0_EXT0_ET_IiLj5EEEv(
+ // CHECK-LABEL: define linkonce_odr <25 x i32> @_ZNK13identmatrix_tcvu11matrix_typeIXT0_EXT0_ET_EIiLj5EEEv(
// CHECK-LABEL: for.body: ; preds = %for.cond
// CHECK-NEXT: [[I:%.*]] = load i32, i32* %i, align 4
// CHECK-NEXT: [[I_EXT:%.*]] = zext i32 [[I]] to i64
Index: clang/test/CodeGenCXX/matrix-type-builtins.cpp
===================================================================
--- clang/test/CodeGenCXX/matrix-type-builtins.cpp
+++ clang/test/CodeGenCXX/matrix-type-builtins.cpp
@@ -67,7 +67,7 @@
}
void test_transpose_const(const matrix_t<float, 3, 3> &m) {
- // CHECK-LABEL: define void @_Z20test_transpose_constRKU11matrix_typeLm3ELm3Ef(
+ // CHECK-LABEL: define void @_Z20test_transpose_constRKu11matrix_typeILm3ELm3EfE(
// CHECK: [[MATRIX:%.*]] = load <9 x float>, <9 x float>* {{.*}}, align 4
// CHECK-NEXT: [[M_T:%.*]] = call <9 x float> @llvm.matrix.transpose.v9f32(<9 x float> [[MATRIX]], i32 3, i32 3)
// CHECK-NEXT: [[M_T_ADDR:%.*]] = bitcast [9 x float]* %m_t to <9 x float>*
@@ -90,9 +90,9 @@
void test_column_major_load_with_stride_template_double(double *Ptr) {
// CHECK-LABEL: define void @_Z50test_column_major_load_with_stride_template_doublePd(double* %Ptr)
// CHECK: [[PTR:%.*]] = load double*, double** %Ptr.addr, align 8
- // CHECK-NEXT: call <40 x double> @_Z29column_major_load_with_strideIdLj10ELj4ELj15EEU11matrix_typeXT0_EXT1_ET_PS0_(double* [[PTR]])
+ // CHECK-NEXT: call <40 x double> @_Z29column_major_load_with_strideIdLj10ELj4ELj15EEu11matrix_typeIXT0_EXT1_ET_EPS0_(double* [[PTR]])
- // CHECK-LABEL: define linkonce_odr <40 x double> @_Z29column_major_load_with_strideIdLj10ELj4ELj15EEU11matrix_typeXT0_EXT1_ET_PS0_(double* %Ptr)
+ // CHECK-LABEL: define linkonce_odr <40 x double> @_Z29column_major_load_with_strideIdLj10ELj4ELj15EEu11matrix_typeIXT0_EXT1_ET_EPS0_(double* %Ptr)
// CHECK: [[PTR:%.*]] = load double*, double** %Ptr.addr, align 8
// CHECK-NEXT: call <40 x double> @llvm.matrix.column.major.load.v40f64(double* align 8 [[PTR]], i64 15, i1 false, i32 10, i32 4)
@@ -102,9 +102,9 @@
void test_column_major_load_with_stride_template_int(int *Ptr) {
// CHECK-LABEL: define void @_Z47test_column_major_load_with_stride_template_intPi(i32* %Ptr) #5 {
// CHECK: [[PTR:%.*]] = load i32*, i32** %Ptr.addr, align 8
- // CHECK-NEXT: call <6 x i32> @_Z29column_major_load_with_strideIiLj3ELj2ELj12EEU11matrix_typeXT0_EXT1_ET_PS0_(i32* [[PTR]])
+ // CHECK-NEXT: call <6 x i32> @_Z29column_major_load_with_strideIiLj3ELj2ELj12EEu11matrix_typeIXT0_EXT1_ET_EPS0_(i32* [[PTR]])
- // CHECK-LABEL: define linkonce_odr <6 x i32> @_Z29column_major_load_with_strideIiLj3ELj2ELj12EEU11matrix_typeXT0_EXT1_ET_PS0_(i32* %Ptr)
+ // CHECK-LABEL: define linkonce_odr <6 x i32> @_Z29column_major_load_with_strideIiLj3ELj2ELj12EEu11matrix_typeIXT0_EXT1_ET_EPS0_(i32* %Ptr)
// CHECK: [[PTR:%.*]] = load i32*, i32** %Ptr.addr, align 8
// CHECK-NEXT: call <6 x i32> @llvm.matrix.column.major.load.v6i32(i32* align 4 [[PTR]], i64 12, i1 false, i32 3, i32 2)
@@ -195,9 +195,9 @@
void test_column_major_store_with_stride_template_double(double *Ptr) {
// CHECK-LABEL: define void @_Z51test_column_major_store_with_stride_template_doublePd(double* %Ptr)
// CHECK: [[PTR:%.*]] = load double*, double** %Ptr.addr, align 8
- // CHECK-NEXT: call void @_Z30column_major_store_with_strideIdLj10ELj4ELj15EEvRU11matrix_typeXT0_EXT1_ET_PS0_([40 x double]* nonnull align 8 dereferenceable(320) %M1, double* [[PTR]])
+ // CHECK-NEXT: call void @_Z30column_major_store_with_strideIdLj10ELj4ELj15EEvRu11matrix_typeIXT0_EXT1_ET_EPS0_([40 x double]* nonnull align 8 dereferenceable(320) %M1, double* [[PTR]])
- // CHECK-LABEL: define linkonce_odr void @_Z30column_major_store_with_strideIdLj10ELj4ELj15EEvRU11matrix_typeXT0_EXT1_ET_PS0_([40 x double]* nonnull align 8 dereferenceable(320) %m, double* %Ptr)
+ // CHECK-LABEL: define linkonce_odr void @_Z30column_major_store_with_strideIdLj10ELj4ELj15EEvRu11matrix_typeIXT0_EXT1_ET_EPS0_([40 x double]* nonnull align 8 dereferenceable(320) %m, double* %Ptr)
// CHECK: [[M:%.*]] = load <40 x double>, <40 x double>* {{.*}}, align 8
// CHECK-NEXT: [[PTR:%.*]] = load double*, double** %Ptr.addr, align 8
// CHECK-NEXT: call void @llvm.matrix.column.major.store.v40f64(<40 x double> [[M]], double* align 8 [[PTR]], i64 15, i1 false, i32 10, i32 4)
@@ -209,9 +209,9 @@
void test_column_major_store_with_stride_template_int(int *Ptr) {
// CHECK-LABEL: define void @_Z48test_column_major_store_with_stride_template_intPi(i32* %Ptr)
// CHECK: [[PTR:%.*]] = load i32*, i32** %Ptr.addr, align 8
- // CHECK-NEXT: call void @_Z30column_major_store_with_strideIiLj3ELj2ELj3EEvRU11matrix_typeXT0_EXT1_ET_PS0_([6 x i32]* nonnull align 4 dereferenceable(24) %M1, i32* [[PTR]])
+ // CHECK-NEXT: call void @_Z30column_major_store_with_strideIiLj3ELj2ELj3EEvRu11matrix_typeIXT0_EXT1_ET_EPS0_([6 x i32]* nonnull align 4 dereferenceable(24) %M1, i32* [[PTR]])
- // CHECK-LABEL: define linkonce_odr void @_Z30column_major_store_with_strideIiLj3ELj2ELj3EEvRU11matrix_typeXT0_EXT1_ET_PS0_([6 x i32]* nonnull align 4 dereferenceable(24) %m, i32* %Ptr)
+ // CHECK-LABEL: define linkonce_odr void @_Z30column_major_store_with_strideIiLj3ELj2ELj3EEvRu11matrix_typeIXT0_EXT1_ET_EPS0_([6 x i32]* nonnull align 4 dereferenceable(24) %m, i32* %Ptr)
// CHECK: [[M:%.*]] = load <6 x i32>, <6 x i32>* {{.*}}, align 4
// CHECK-NEXT: [[PTR:%.*]] = load i32*, i32** %Ptr.addr, align 8
// CHECK-NEXT: call void @llvm.matrix.column.major.store.v6i32(<6 x i32> [[M]], i32* align 4 [[PTR]], i64 3, i1 false, i32 3, i32 2)
Index: clang/lib/AST/ItaniumMangle.cpp
===================================================================
--- clang/lib/AST/ItaniumMangle.cpp
+++ clang/lib/AST/ItaniumMangle.cpp
@@ -3493,10 +3493,13 @@
}
void CXXNameMangler::mangleType(const ConstantMatrixType *T) {
- // Mangle matrix types using a vendor extended type qualifier:
- // U<Len>matrix_type<Rows><Columns><element type>
+ // Mangle matrix types as a vendor extended type:
+ // u<Len>matrix_typeI<Rows><Columns><element type>E
+
StringRef VendorQualifier = "matrix_type";
- Out << "U" << VendorQualifier.size() << VendorQualifier;
+ Out << "u" << VendorQualifier.size() << VendorQualifier;
+
+ Out << "I";
auto &ASTCtx = getASTContext();
unsigned BitWidth = ASTCtx.getTypeSize(ASTCtx.getSizeType());
llvm::APSInt Rows(BitWidth);
@@ -3506,15 +3509,20 @@
Columns = T->getNumColumns();
mangleIntegerLiteral(ASTCtx.getSizeType(), Columns);
mangleType(T->getElementType());
+ Out << "E";
}
void CXXNameMangler::mangleType(const DependentSizedMatrixType *T) {
- // U<Len>matrix_type<row expr><column expr><element type>
+ // Mangle matrix types as a vendor extended type:
+ // u<Len>matrix_typeI<row expr><column expr><element type>E
StringRef VendorQualifier = "matrix_type";
- Out << "U" << VendorQualifier.size() << VendorQualifier;
+ Out << "u" << VendorQualifier.size() << VendorQualifier;
+
+ Out << "I";
mangleTemplateArg(T->getRowExpr());
mangleTemplateArg(T->getColumnExpr());
mangleType(T->getElementType());
+ Out << "E";
}
void CXXNameMangler::mangleType(const DependentAddressSpaceType *T) {
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