lei added inline comments.
================ Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:2658 + return false; +} + ---------------- There's alot of nested `if`s, would it be possible to refactor to have some early exits instead? ================ Comment at: llvm/test/CodeGen/PowerPC/dform-pair-load-store.ll:2 +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ +; RUN: -mcpu=pwr10 < %s | FileCheck %s + ---------------- BE test? Can we add `-ppc-asm-full-reg-names` and update the checks to also ensure the reg info is accurate? ================ Comment at: llvm/test/CodeGen/PowerPC/dform-pair-load-store.ll:4 + +target datalayout = "e-m:e-i64:64-p:64:64-n32:64-v256:256:256-v512:512:512" + ---------------- is this needed since we have the triple on the run line? ================ Comment at: llvm/test/CodeGen/PowerPC/loop-p10-pair-prepare.ll:3 +; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -disable-lsr \ +; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 < %s | FileCheck %s + ---------------- BE test? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90799/new/ https://reviews.llvm.org/D90799 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
