amyk added inline comments.
================ Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:4 // RUN: -target-cpu pwr10 -triple powerpc64-unknown-unknown -emit-llvm %s \ -// RUN: -o - | FileCheck %s -check-prefixes=CHECK-BE,CHECK +// RUN: -o - | FileCheck %s -check-prefixes=CHECK-BE,CHECK -check-prefix=CHECK-COMMON // RUN: %clang_cc1 -target-feature +vsx \ ---------------- The `CHECK-COMMON` should not be needed. You can just use the `CHECK` prefix in the tests since we have set up check prefixes. ================ Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:1295 def XSCVSQQP : X_VT5_XO5_VB5<63, 11, 836, "xscvsqqp", []>; + def VRLQ : VX1_VT5_VA5_VB5<5, "vrlq", []>; + def VRLQNM : VX1_VT5_VA5_VB5<325, "vrlqnm", ---------------- If possible, I think it is better to leave the instruction patterns in the position they were in, and just add the patterns to them. ================ Comment at: llvm/test/CodeGen/PowerPC/p10-vector-rotate.ll:2 +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ +; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ ---------------- Please also add the BE run line. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D86819/new/ https://reviews.llvm.org/D86819 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
