Author: mzuckerm Date: Mon Apr 11 10:46:39 2016 New Revision: 265952 URL: http://llvm.org/viewvc/llvm-project?rev=265952&view=rev Log: [CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693 Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def cfe/trunk/lib/Headers/avx512fintrin.h cfe/trunk/lib/Headers/avx512vlintrin.h cfe/trunk/test/CodeGen/avx512f-builtins.c cfe/trunk/test/CodeGen/avx512vl-builtins.c Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=265952&r1=265951&r2=265952&view=diff ============================================================================== --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Mon Apr 11 10:46:39 2016 @@ -1908,6 +1908,16 @@ TARGET_BUILTIN(__builtin_ia32_scalefpd51 TARGET_BUILTIN(__builtin_ia32_scalefps512_mask, "V16fV16fV16fV16fUsIi","","avx512f") TARGET_BUILTIN(__builtin_ia32_scalefsd_round_mask, "V2dV2dV2dV2dUcIi","","avx512f") TARGET_BUILTIN(__builtin_ia32_scalefss_round_mask, "V4fV4fV4fV4fUcIi","","avx512f") +TARGET_BUILTIN(__builtin_ia32_psradi512_mask, "V16iV16iiV16iUs","","avx512f") +TARGET_BUILTIN(__builtin_ia32_psraqi512_mask, "V8LLiV8LLiiV8LLiUc","","avx512f") +TARGET_BUILTIN(__builtin_ia32_psrad128_mask, "V4iV4iV4iV4iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psrad256_mask, "V8iV8iV4iV8iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psradi128_mask, "V4iV4iIiV4iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psradi256_mask, "V8iV8iIiV8iUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psraq128_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psraq256_mask, "V4LLiV4LLiV2LLiV4LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psraqi128_mask, "V2LLiV2LLiIiV2LLiUc","","avx512vl") +TARGET_BUILTIN(__builtin_ia32_psraqi256_mask, "V4LLiV4LLiIiV4LLiUc","","avx512vl") #undef BUILTIN #undef TARGET_BUILTIN Modified: cfe/trunk/lib/Headers/avx512fintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=265952&r1=265951&r2=265952&view=diff ============================================================================== --- cfe/trunk/lib/Headers/avx512fintrin.h (original) +++ cfe/trunk/lib/Headers/avx512fintrin.h Mon Apr 11 10:46:39 2016 @@ -4874,6 +4874,49 @@ __builtin_ia32_scalefss_round_mask ((__v _MM_FROUND_CUR_DIRECTION);\ }) +static __inline__ __m512i __DEFAULT_FN_ATTRS +_mm512_srai_epi32 (__m512i __A, unsigned int __B) +{ + return (__m512i) __builtin_ia32_psradi512_mask ((__v16si) __A, __B, + (__v16si) + _mm512_setzero_si512 (), + (__mmask16) -1); +} + +#define _mm512_mask_srai_epi32( __W, __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psradi512_mask ((__v16si)( __A),( __B),\ + (__v16si)( __W),\ + (__mmask16)( __U));\ +}) + +#define _mm512_maskz_srai_epi32( __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psradi512_mask ((__v16si)( __A),( __B),\ + (__v16si)\ + _mm512_setzero_si512 (),\ + (__mmask16)( __U));\ +}) + +#define _mm512_srai_epi64( __A, __B) __extension__ ({ \ +__builtin_ia32_psraqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)\ + _mm512_setzero_si512 (),\ + (__mmask8) -1);\ +}) + +#define _mm512_mask_srai_epi64( __W, __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psraqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm512_maskz_srai_epi64( __U, __A, __B) __extension__ ({ \ +__builtin_ia32_psraqi512_mask ((__v8di)( __A),( __B),\ + (__v8di)\ + _mm512_setzero_si512 (),\ + (__mmask8)( __U));\ +}) + + #undef __DEFAULT_FN_ATTRS #endif // __AVX512FINTRIN_H Modified: cfe/trunk/lib/Headers/avx512vlintrin.h URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512vlintrin.h?rev=265952&r1=265951&r2=265952&view=diff ============================================================================== --- cfe/trunk/lib/Headers/avx512vlintrin.h (original) +++ cfe/trunk/lib/Headers/avx512vlintrin.h Mon Apr 11 10:46:39 2016 @@ -7241,6 +7241,172 @@ _mm256_maskz_unpacklo_epi64 (__mmask8 __ (__mmask8) __U); } +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_sra_epi32 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psrad128_mask ((__v4si) __A, + (__v4si) __B, + (__v4si) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_sra_epi32 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psrad128_mask ((__v4si) __A, + (__v4si) __B, + (__v4si) + _mm_setzero_si128 (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_sra_epi32 (__m256i __W, __mmask8 __U, __m256i __A, + __m128i __B) +{ + return (__m256i) __builtin_ia32_psrad256_mask ((__v8si) __A, + (__v4si) __B, + (__v8si) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_sra_epi32 (__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psrad256_mask ((__v8si) __A, + (__v4si) __B, + (__v8si) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +#define _mm_mask_srai_epi32( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psradi128_mask ((__v4si)( __A),( __imm),\ + (__v4si)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_srai_epi32( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psradi128_mask ((__v4si)( __A),( __imm),\ + (__v4si)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_srai_epi32( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psradi256_mask ((__v8si)( __A),( __imm),\ + (__v8si)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_srai_epi32( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psradi256_mask ((__v8si)( __A),( __imm),\ + (__v8si)\ + _mm256_setzero_si256 (),\ + (__mmask8)( __U));\ +}) + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_sra_epi64 (__m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psraq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) + _mm_setzero_di (), + (__mmask8) -1); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_mask_sra_epi64 (__m128i __W, __mmask8 __U, __m128i __A, + __m128i __B) +{ + return (__m128i) __builtin_ia32_psraq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) __W, + (__mmask8) __U); +} + +static __inline__ __m128i __DEFAULT_FN_ATTRS +_mm_maskz_sra_epi64 (__mmask8 __U, __m128i __A, __m128i __B) +{ + return (__m128i) __builtin_ia32_psraq128_mask ((__v2di) __A, + (__v2di) __B, + (__v2di) + _mm_setzero_di (), + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_sra_epi64 (__m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psraq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) -1); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_mask_sra_epi64 (__m256i __W, __mmask8 __U, __m256i __A, + __m128i __B) +{ + return (__m256i) __builtin_ia32_psraq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) __W, + (__mmask8) __U); +} + +static __inline__ __m256i __DEFAULT_FN_ATTRS +_mm256_maskz_sra_epi64 (__mmask8 __U, __m256i __A, __m128i __B) +{ + return (__m256i) __builtin_ia32_psraq256_mask ((__v4di) __A, + (__v2di) __B, + (__v4di) + _mm256_setzero_si256 (), + (__mmask8) __U); +} + +#define _mm_srai_epi64( __A, __imm) __extension__ ({ \ +__builtin_ia32_psraqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)\ + _mm_setzero_di (),\ + (__mmask8) -1);\ +}) + +#define _mm_mask_srai_epi64( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psraqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_srai_epi64( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psraqi128_mask ((__v2di)( __A),( __imm),\ + (__v2di)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_srai_epi64( __A, __imm) __extension__ ({ \ +__builtin_ia32_psraqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)\ + _mm256_setzero_si256 (),\ + (__mmask8) -1);\ +}) + +#define _mm256_mask_srai_epi64( __W, __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psraqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_srai_epi64( __U, __A, __imm) __extension__ ({ \ +__builtin_ia32_psraqi256_mask ((__v4di)( __A),( __imm),\ + (__v4di)\ + _mm256_setzero_si256 (),\ + (__mmask8)( __U));\ +}) + #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_BOTH Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=265952&r1=265951&r2=265952&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512f-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512f-builtins.c Mon Apr 11 10:46:39 2016 @@ -3251,3 +3251,39 @@ __m128 test_mm_maskz_scalef_round_ss(__m // CHECK: @llvm.x86.avx512.mask.scalef.ss return _mm_maskz_scalef_round_ss(__U, __A, __B, _MM_FROUND_CUR_DIRECTION); } + +__m512i test_mm512_srai_epi32(__m512i __A) { + // CHECK-LABEL: @test_mm512_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.512 + return _mm512_srai_epi32(__A, 5); +} + +__m512i test_mm512_mask_srai_epi32(__m512i __W, __mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.512 + return _mm512_mask_srai_epi32(__W, __U, __A, 5); +} + +__m512i test_mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.512 + return _mm512_maskz_srai_epi32(__U, __A, 5); +} + +__m512i test_mm512_srai_epi64(__m512i __A) { + // CHECK-LABEL: @test_mm512_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.512 + return _mm512_srai_epi64(__A, 5); +} + +__m512i test_mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.512 + return _mm512_mask_srai_epi64(__W, __U, __A, 5); +} + +__m512i test_mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.512 + return _mm512_maskz_srai_epi64(__U, __A, 5); +} Modified: cfe/trunk/test/CodeGen/avx512vl-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vl-builtins.c?rev=265952&r1=265951&r2=265952&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512vl-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512vl-builtins.c Mon Apr 11 10:46:39 2016 @@ -4895,3 +4895,123 @@ __m256i test_mm256_maskz_unpacklo_epi64( // CHECK: @llvm.x86.avx512.mask.punpcklqd.q.256 return _mm256_maskz_unpacklo_epi64(__U, __A, __B); } + +__m128i test_mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_mask_sra_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.d.128 + return _mm_mask_sra_epi32(__W, __U, __A, __B); +} + +__m128i test_mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_maskz_sra_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.d.128 + return _mm_maskz_sra_epi32(__U, __A, __B); +} + +__m256i test_mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_mask_sra_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.d.256 + return _mm256_mask_sra_epi32(__W, __U, __A, __B); +} + +__m256i test_mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_maskz_sra_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.d.256 + return _mm256_maskz_sra_epi32(__U, __A, __B); +} + +__m128i test_mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_mask_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.128 + return _mm_mask_srai_epi32(__W, __U, __A, 5); +} + +__m128i test_mm_maskz_srai_epi32(__mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_maskz_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.128 + return _mm_maskz_srai_epi32(__U, __A, 5); +} + +__m256i test_mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_mask_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.256 + return _mm256_mask_srai_epi32(__W, __U, __A, 5); +} + +__m256i test_mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_maskz_srai_epi32 + // CHECK: @llvm.x86.avx512.mask.psra.di.256 + return _mm256_maskz_srai_epi32(__U, __A, 5); +} + +__m128i test_mm_sra_epi64(__m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_sra_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.q.128 + return _mm_sra_epi64(__A, __B); +} + +__m128i test_mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_mask_sra_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.q.128 + return _mm_mask_sra_epi64(__W, __U, __A, __B); +} + +__m128i test_mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B) { + // CHECK-LABEL: @test_mm_maskz_sra_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.q.128 + return _mm_maskz_sra_epi64(__U, __A, __B); +} + +__m256i test_mm256_sra_epi64(__m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_sra_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.q.256 + return _mm256_sra_epi64(__A, __B); +} + +__m256i test_mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_mask_sra_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.q.256 + return _mm256_mask_sra_epi64(__W, __U, __A, __B); +} + +__m256i test_mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B) { + // CHECK-LABEL: @test_mm256_maskz_sra_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.q.256 + return _mm256_maskz_sra_epi64(__U, __A, __B); +} + +__m128i test_mm_srai_epi64(__m128i __A) { + // CHECK-LABEL: @test_mm_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.128 + return _mm_srai_epi64(__A, 5); +} + +__m128i test_mm_mask_srai_epi64(__m128i __W, __mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_mask_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.128 + return _mm_mask_srai_epi64(__W, __U, __A, 5); +} + +__m128i test_mm_maskz_srai_epi64(__mmask8 __U, __m128i __A) { + // CHECK-LABEL: @test_mm_maskz_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.128 + return _mm_maskz_srai_epi64(__U, __A, 5); +} + +__m256i test_mm256_srai_epi64(__m256i __A) { + // CHECK-LABEL: @test_mm256_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.256 + return _mm256_srai_epi64(__A, 5); +} + +__m256i test_mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_mask_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.256 + return _mm256_mask_srai_epi64(__W, __U, __A, 5); +} + +__m256i test_mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A) { + // CHECK-LABEL: @test_mm256_maskz_srai_epi64 + // CHECK: @llvm.x86.avx512.mask.psra.qi.256 + return _mm256_maskz_srai_epi64(__U, __A, 5); +} \ No newline at end of file _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
