c-rhodes created this revision.
c-rhodes added reviewers: efriedma, sdesmalen, rsandifo-arm.
Herald added subscribers: kristof.beyls, tschuett.
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c-rhodes requested review of this revision.
The element types of scalable vectors are defined in terms of stdint
types in the ACLE. This patch fixes the mapping to builtin types for the
ILP32 ABI when creating VLS types with the arm_sve_vector_bits, where
the mapping is as follows:
int32_t -> LongTy
int64_t -> LongLongTy
uint32_t -> UnsignedLongTy
uint64_t -> UnsignedLongLongTy
The test uses the 'aarch64_32-unknown-darwin' triple since that seems to be the
only AArch64 target with ILP32 ABI support. Interested in suggestions if
there's another way to test this.
For more information, see:
https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#types-varying-by-data-model
https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#appendix-support-for-scalable-vectors
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D87358
Files:
clang/lib/AST/Type.cpp
clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
Index: clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
===================================================================
--- clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
+++ clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
@@ -4,6 +4,7 @@
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +bf16 -msve-vector-bits=512 -fallow-half-arguments-and-returns
-S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-512
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +bf16 -msve-vector-bits=1024 -fallow-half-arguments-and-returns
-S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-1024
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve
-target-feature +bf16 -msve-vector-bits=2048 -fallow-half-arguments-and-returns
-S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-2048
+// RUN: %clang_cc1 -triple aarch64_32-unknown-darwin -target-feature +sve
-target-feature +bf16 -msve-vector-bits=512 -fallow-half-arguments-and-returns
-S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ILP32
#include <arm_sve.h>
@@ -579,3 +580,11 @@
// CHECK-2048-NEXT: %local_arr_f64 = alloca [3 x <32 x double>], align 16
// CHECK-2048-NEXT: %local_arr_bf16 = alloca [3 x <128 x bfloat>], align 16
// CHECK-2048-NEXT: %local_arr_bool = alloca [3 x <32 x i8>], align 2
+
+//===----------------------------------------------------------------------===//
+// ILP32 ABI
+//===----------------------------------------------------------------------===//
+// CHECK-ILP32: @global_i32 = global <16 x i32> zeroinitializer, align 16
+// CHECK-ILP32: @global_i64 = global <8 x i64> zeroinitializer, align 16
+// CHECK-ILP32: @global_u32 = global <16 x i32> zeroinitializer, align 16
+// CHECK-ILP32: @global_u64 = global <8 x i64> zeroinitializer, align 16
Index: clang/lib/AST/Type.cpp
===================================================================
--- clang/lib/AST/Type.cpp
+++ clang/lib/AST/Type.cpp
@@ -2316,6 +2316,9 @@
QualType Type::getSveEltType(const ASTContext &Ctx) const {
assert(isVLSTBuiltinType() && "unsupported type!");
+ llvm::Triple Triple = Ctx.getTargetInfo().getTriple();
+ bool IsILP32 = Triple.getArch() == llvm::Triple::aarch64_32;
+
const BuiltinType *BTy = getAs<BuiltinType>();
switch (BTy->getKind()) {
default:
@@ -2333,13 +2336,13 @@
case BuiltinType::SveUint16:
return Ctx.UnsignedShortTy;
case BuiltinType::SveInt32:
- return Ctx.IntTy;
+ return IsILP32 ? Ctx.LongTy : Ctx.IntTy;
case BuiltinType::SveUint32:
- return Ctx.UnsignedIntTy;
+ return IsILP32 ? Ctx.UnsignedLongTy : Ctx.UnsignedIntTy;
case BuiltinType::SveInt64:
- return Ctx.LongTy;
+ return IsILP32 ? Ctx.LongLongTy : Ctx.LongTy;
case BuiltinType::SveUint64:
- return Ctx.UnsignedLongTy;
+ return IsILP32 ? Ctx.UnsignedLongLongTy : Ctx.UnsignedLongTy;
case BuiltinType::SveFloat16:
return Ctx.Float16Ty;
case BuiltinType::SveBFloat16:
Index: clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
===================================================================
--- clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
+++ clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
@@ -4,6 +4,7 @@
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -msve-vector-bits=512 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-512
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -msve-vector-bits=1024 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-1024
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -msve-vector-bits=2048 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-2048
+// RUN: %clang_cc1 -triple aarch64_32-unknown-darwin -target-feature +sve -target-feature +bf16 -msve-vector-bits=512 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ILP32
#include <arm_sve.h>
@@ -579,3 +580,11 @@
// CHECK-2048-NEXT: %local_arr_f64 = alloca [3 x <32 x double>], align 16
// CHECK-2048-NEXT: %local_arr_bf16 = alloca [3 x <128 x bfloat>], align 16
// CHECK-2048-NEXT: %local_arr_bool = alloca [3 x <32 x i8>], align 2
+
+//===----------------------------------------------------------------------===//
+// ILP32 ABI
+//===----------------------------------------------------------------------===//
+// CHECK-ILP32: @global_i32 = global <16 x i32> zeroinitializer, align 16
+// CHECK-ILP32: @global_i64 = global <8 x i64> zeroinitializer, align 16
+// CHECK-ILP32: @global_u32 = global <16 x i32> zeroinitializer, align 16
+// CHECK-ILP32: @global_u64 = global <8 x i64> zeroinitializer, align 16
Index: clang/lib/AST/Type.cpp
===================================================================
--- clang/lib/AST/Type.cpp
+++ clang/lib/AST/Type.cpp
@@ -2316,6 +2316,9 @@
QualType Type::getSveEltType(const ASTContext &Ctx) const {
assert(isVLSTBuiltinType() && "unsupported type!");
+ llvm::Triple Triple = Ctx.getTargetInfo().getTriple();
+ bool IsILP32 = Triple.getArch() == llvm::Triple::aarch64_32;
+
const BuiltinType *BTy = getAs<BuiltinType>();
switch (BTy->getKind()) {
default:
@@ -2333,13 +2336,13 @@
case BuiltinType::SveUint16:
return Ctx.UnsignedShortTy;
case BuiltinType::SveInt32:
- return Ctx.IntTy;
+ return IsILP32 ? Ctx.LongTy : Ctx.IntTy;
case BuiltinType::SveUint32:
- return Ctx.UnsignedIntTy;
+ return IsILP32 ? Ctx.UnsignedLongTy : Ctx.UnsignedIntTy;
case BuiltinType::SveInt64:
- return Ctx.LongTy;
+ return IsILP32 ? Ctx.LongLongTy : Ctx.LongTy;
case BuiltinType::SveUint64:
- return Ctx.UnsignedLongTy;
+ return IsILP32 ? Ctx.UnsignedLongLongTy : Ctx.UnsignedLongTy;
case BuiltinType::SveFloat16:
return Ctx.Float16Ty;
case BuiltinType::SveBFloat16:
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