yaxunl marked 4 inline comments as done.
yaxunl added inline comments.
================
Comment at: clang/include/clang/Basic/TargetInfo.h:1418
+ /// Whether floating point atomic fetch add/sub is supported.
+ virtual bool isFPAtomicFetchAddSubSupported() const { return false; }
+
----------------
tra wrote:
> yaxunl wrote:
> > tra wrote:
> > > I think it should be predicated on specific type.
> > > E.g. NVPTX supports atomic ops on fp32 ~everywhere, but fp64 atomic
> > > add/sub is only supported on newer GPUs.
> > > And then there's fp16...
> > will do and add tests for fp16
> The number of bits alone may not be sufficient to differentiate the FP
> variants.
> E.g. 16-bit floats currently have 2 variants: IEEE FP16 and BFloat16
> (supported by intel and newer NVIDIA GPUs).
> CUDA-11 has introduced TF32 FP format, so we're likely to have more than one
> 32-bit FP type, too.
> I think PPC has an odd `long double` variant represented as pair of 64-bit
> doubles.
>
will use llvm::fltSemantics for checking, which should cover different fp types.
================
Comment at: clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu:26
+ // CHECK: atomicrmw fsub double* {{.*}} monotonic
+ return __atomic_fetch_sub(p, 1.0, memory_order_relaxed);
+}
----------------
ldionne wrote:
> Nitpick, but this should be `1.0L` to be consistent.
done
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D71726/new/
https://reviews.llvm.org/D71726
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