Author: Craig Topper Date: 2020-06-26T23:32:17-07:00 New Revision: 9e8b5a20e9ec66df71e6540ee6720cbde339a7ae
URL: https://github.com/llvm/llvm-project/commit/9e8b5a20e9ec66df71e6540ee6720cbde339a7ae DIFF: https://github.com/llvm/llvm-project/commit/9e8b5a20e9ec66df71e6540ee6720cbde339a7ae.diff LOG: [X86] Add MOVBE and RDRND features to BDVER4. Only 6 years behind gcc. https://gcc.gnu.org/legacy-ml/gcc-patches/2014-08/msg00231.html Found while working on improving how we define CPU features for clang and auditing for correctness. Added: Modified: clang/lib/Basic/Targets/X86.cpp clang/test/Preprocessor/predefined-arch-macros.c llvm/lib/Target/X86/X86.td Removed: ################################################################################ diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index fdc59f0583ba..653db5e8b4ac 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -414,6 +414,8 @@ bool X86TargetInfo::initFeatureMap( case CK_BDVER4: setFeatureEnabledImpl(Features, "avx2", true); setFeatureEnabledImpl(Features, "bmi2", true); + setFeatureEnabledImpl(Features, "movbe", true); + setFeatureEnabledImpl(Features, "rdrnd", true); setFeatureEnabledImpl(Features, "mwaitx", true); LLVM_FALLTHROUGH; case CK_BDVER3: diff --git a/clang/test/Preprocessor/predefined-arch-macros.c b/clang/test/Preprocessor/predefined-arch-macros.c index 91f6a99a29c2..79a95c356b39 100644 --- a/clang/test/Preprocessor/predefined-arch-macros.c +++ b/clang/test/Preprocessor/predefined-arch-macros.c @@ -2753,9 +2753,11 @@ // CHECK_BDVER4_M32: #define __LWP__ 1 // CHECK_BDVER4_M32: #define __LZCNT__ 1 // CHECK_BDVER4_M32: #define __MMX__ 1 +// CHECK_BDVER4_M32: #define __MOVBE__ 1 // CHECK_BDVER4_M32: #define __PCLMUL__ 1 // CHECK_BDVER4_M32: #define __POPCNT__ 1 // CHECK_BDVER4_M32: #define __PRFCHW__ 1 +// CHECK_BDVER4_M32: #define __RDRND__ 1 // CHECK_BDVER4_M32: #define __SSE2_MATH__ 1 // CHECK_BDVER4_M32: #define __SSE2__ 1 // CHECK_BDVER4_M32: #define __SSE3__ 1 @@ -2791,9 +2793,11 @@ // CHECK_BDVER4_M64: #define __LWP__ 1 // CHECK_BDVER4_M64: #define __LZCNT__ 1 // CHECK_BDVER4_M64: #define __MMX__ 1 +// CHECK_BDVER4_M64: #define __MOVBE__ 1 // CHECK_BDVER4_M64: #define __PCLMUL__ 1 // CHECK_BDVER4_M64: #define __POPCNT__ 1 // CHECK_BDVER4_M64: #define __PRFCHW__ 1 +// CHECK_BDVER4_M64: #define __RDRND__ 1 // CHECK_BDVER4_M64: #define __SSE2_MATH__ 1 // CHECK_BDVER4_M64: #define __SSE2__ 1 // CHECK_BDVER4_M64: #define __SSE3__ 1 diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index d68fb970b571..1d8b5f4f6899 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -946,6 +946,8 @@ def ProcessorFeatures { // Excavator list<SubtargetFeature> BdVer4AdditionalFeatures = [FeatureAVX2, FeatureBMI2, + FeatureMOVBE, + FeatureRDRAND, FeatureMWAITX]; list<SubtargetFeature> BdVer4InheritableFeatures = !listconcat(BdVer3InheritableFeatures, BdVer4AdditionalFeatures); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
